DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS

DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS

The design of low power high performance Multiply and Accumulate (MAC) unit is presented in this paper. The power analysis for MAC unit is carried out for image filtering application exploiting insignificant bits in pixel values. The developed technique is found to reduce dynamic power consumption b...

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Bibliographic Details
Main Authors: M. Madheswaran, S. Saravanan
Format: Article
Language:English
Published: ICT Academy of Tamil Nadu 2012-08-01
Series:ICTACT Journal on Image and Video Processing
Subjects:
Low Power
VLSI Design
Booth Multiplier
MAC
Online Access:http://ictactjournals.in/paper/IJIVP(Aug2012)_Vol3_Iss1_P3_459_466.pdf
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spelling doaj-2a33d257838a44bb9e7a3f1a0cb69e932020-11-25T00:53:20ZengICT Academy of Tamil NaduICTACT Journal on Image and Video Processing0976-90990976-91022012-08-0131459466DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMSM. Madheswaran0S. Saravanan1Centre for Advanced Research, Department of Electronics and Communication Engineering, Muthayammal Engineering College, IndiaCentre for Advanced Research, Department of Electronics and Communication Engineering, Muthayammal Engineering College, IndiaThe design of low power high performance Multiply and Accumulate (MAC) unit is presented in this paper. The power analysis for MAC unit is carried out for image filtering application exploiting insignificant bits in pixel values. The developed technique is found to reduce dynamic power consumption by analyzing the bit patterns in the input data which reduces the switching activities. The power consumption of the developed multiplier is compared with existing multiplier techniques and found that is performs better. It is observed from the simulation using SYNOPSIS EDA tool that the proposed pixel properties reusability technique saves power up to 88% with small area over head when used in MAC unit.http://ictactjournals.in/paper/IJIVP(Aug2012)_Vol3_Iss1_P3_459_466.pdfLow PowerVLSI DesignBooth MultiplierMAC
collection DOAJ
language English
format Article
sources DOAJ
author M. Madheswaran
S. Saravanan
spellingShingle M. Madheswaran
S. Saravanan
DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS
ICTACT Journal on Image and Video Processing
Low Power
VLSI Design
Booth Multiplier
MAC
author_facet M. Madheswaran
S. Saravanan
author_sort M. Madheswaran
title DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS
title_short DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS
title_full DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS
title_fullStr DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS
title_full_unstemmed DESIGN AND ANALYSIS OF LOW POWER MULTIPLY AND ACCUMULATE UNIT USING PIXEL PROPERTIES REUSABILITY TECHNIQUE FOR IMAGE PROCESSING SYSTEMS
title_sort design and analysis of low power multiply and accumulate unit using pixel properties reusability technique for image processing systems
publisher ICT Academy of Tamil Nadu
series ICTACT Journal on Image and Video Processing
issn 0976-9099
0976-9102
publishDate 2012-08-01
description The design of low power high performance Multiply and Accumulate (MAC) unit is presented in this paper. The power analysis for MAC unit is carried out for image filtering application exploiting insignificant bits in pixel values. The developed technique is found to reduce dynamic power consumption by analyzing the bit patterns in the input data which reduces the switching activities. The power consumption of the developed multiplier is compared with existing multiplier techniques and found that is performs better. It is observed from the simulation using SYNOPSIS EDA tool that the proposed pixel properties reusability technique saves power up to 88% with small area over head when used in MAC unit.
topic Low Power
VLSI Design
Booth Multiplier
MAC
url http://ictactjournals.in/paper/IJIVP(Aug2012)_Vol3_Iss1_P3_459_466.pdf
work_keys_str_mv AT mmadheswaran designandanalysisoflowpowermultiplyandaccumulateunitusingpixelpropertiesreusabilitytechniqueforimageprocessingsystems
AT ssaravanan designandanalysisoflowpowermultiplyandaccumulateunitusingpixelpropertiesreusabilitytechniqueforimageprocessingsystems
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