Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes
Two types of single-photon avalanche diodes (SPADs) with different diameters are investigated regarding their avalanche behavior. SPAD type A was designed in standard 0.35-µm complementary metal-oxide-semiconductor (CMOS) including a 12-µm thick p<sup>-</sup> epi-layer with diameters of...
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2020-09-01
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doaj-329272ad230a474495504b321f713ea52020-11-25T02:31:23ZengMDPI AGMicromachines2072-666X2020-09-011186986910.3390/mi11090869Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche DiodesBernhard Goll0Bernhard Steindl1Horst Zimmermann2Institute of Electrodynamics, Microwave and Circuit Engineering, TU Wien, Gusshausstrasse 25/E354-02, A-1040 Wien, AustriaInstitute of Electrodynamics, Microwave and Circuit Engineering, TU Wien, Gusshausstrasse 25/E354-02, A-1040 Wien, AustriaInstitute of Electrodynamics, Microwave and Circuit Engineering, TU Wien, Gusshausstrasse 25/E354-02, A-1040 Wien, AustriaTwo types of single-photon avalanche diodes (SPADs) with different diameters are investigated regarding their avalanche behavior. SPAD type A was designed in standard 0.35-µm complementary metal-oxide-semiconductor (CMOS) including a 12-µm thick p<sup>-</sup> epi-layer with diameters of 50, 100, 200, and 400 µm; and type B was implemented in the high-voltage (HV) line of this process with diameters of 48.2 and 98.2 µm. Each SPAD is wire-bonded to a 0.35-µm CMOS clocked gating chip, which controls charge up to a maximum 6.6-V excess bias, active, and quench phase as well as readout during one clock period. Measurements of the cathode voltage after photon hits at SPAD type A resulted in fall times (80 to 20%) of 10.2 ns for the 50-µm diameter SPAD for an excess bias of 4.2 V and 3.45 ns for the 200-µm diameter device for an excess bias of 4.26 V. For type B, fall times of 8 ns for 48.2-µm diameter and 5.4-V excess bias as well as 2 ns for 98.2-µm diameter and 5.9-V excess bias were determined. In measuring the whole capacitance at the cathode of the SPAD with gating chip connected, the avalanche currents through the detector were calculated. This resulted in peak avalanche currents of, e.g., 1.19 mA for the 100-µm SPAD type A and 1.64 mA for the 98.2-µm SPAD type B for an excess bias of 5 and 4.9 V, respectively.https://www.mdpi.com/2072-666X/11/9/869single-photon avalanche diode (SPAD)gatingavalanche transients3.3 V/0.35 µm complementary metal-oxide-semiconductor (CMOS) |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Bernhard Goll Bernhard Steindl Horst Zimmermann |
spellingShingle |
Bernhard Goll Bernhard Steindl Horst Zimmermann Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes Micromachines single-photon avalanche diode (SPAD) gating avalanche transients 3.3 V/0.35 µm complementary metal-oxide-semiconductor (CMOS) |
author_facet |
Bernhard Goll Bernhard Steindl Horst Zimmermann |
author_sort |
Bernhard Goll |
title |
Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes |
title_short |
Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes |
title_full |
Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes |
title_fullStr |
Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes |
title_full_unstemmed |
Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes |
title_sort |
avalanche transients of thick 0.35 µm cmos single-photon avalanche diodes |
publisher |
MDPI AG |
series |
Micromachines |
issn |
2072-666X |
publishDate |
2020-09-01 |
description |
Two types of single-photon avalanche diodes (SPADs) with different diameters are investigated regarding their avalanche behavior. SPAD type A was designed in standard 0.35-µm complementary metal-oxide-semiconductor (CMOS) including a 12-µm thick p<sup>-</sup> epi-layer with diameters of 50, 100, 200, and 400 µm; and type B was implemented in the high-voltage (HV) line of this process with diameters of 48.2 and 98.2 µm. Each SPAD is wire-bonded to a 0.35-µm CMOS clocked gating chip, which controls charge up to a maximum 6.6-V excess bias, active, and quench phase as well as readout during one clock period. Measurements of the cathode voltage after photon hits at SPAD type A resulted in fall times (80 to 20%) of 10.2 ns for the 50-µm diameter SPAD for an excess bias of 4.2 V and 3.45 ns for the 200-µm diameter device for an excess bias of 4.26 V. For type B, fall times of 8 ns for 48.2-µm diameter and 5.4-V excess bias as well as 2 ns for 98.2-µm diameter and 5.9-V excess bias were determined. In measuring the whole capacitance at the cathode of the SPAD with gating chip connected, the avalanche currents through the detector were calculated. This resulted in peak avalanche currents of, e.g., 1.19 mA for the 100-µm SPAD type A and 1.64 mA for the 98.2-µm SPAD type B for an excess bias of 5 and 4.9 V, respectively. |
topic |
single-photon avalanche diode (SPAD) gating avalanche transients 3.3 V/0.35 µm complementary metal-oxide-semiconductor (CMOS) |
url |
https://www.mdpi.com/2072-666X/11/9/869 |
work_keys_str_mv |
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