Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation
This paper presents a digitally controlled oscillator (DCO) with a low-complexity circuit structure that combines multiple delay circuits to achieve a high timing resolution and wide output frequency range simultaneously while also significantly reducing the overall power consumption. A 0.18 µm comp...
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doaj-32b3cb1c7e094000927774baa97b95022021-02-17T00:01:57ZengMDPI AGSensors1424-82202021-02-01211377137710.3390/s21041377Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock GenerationDuo Sheng0Wei-Yen Chen1Hao-Ting Huang2Li Tai3Department of Electrical Engineering, Fu Jen Catholic University, New Taipei City 24205, TaiwanDepartment of Electrical Engineering, Fu Jen Catholic University, New Taipei City 24205, TaiwanDepartment of Electrical Engineering, Fu Jen Catholic University, New Taipei City 24205, TaiwanDepartment of Electrical Engineering, Fu Jen Catholic University, New Taipei City 24205, TaiwanThis paper presents a digitally controlled oscillator (DCO) with a low-complexity circuit structure that combines multiple delay circuits to achieve a high timing resolution and wide output frequency range simultaneously while also significantly reducing the overall power consumption. A 0.18 µm complementary metal–oxide–semiconductor standard process was used for the design, and measurements showed that the chip had a minimum controllable timing resolution of 4.81 ps and power consumption of 142 µW with an output signal of 364 MHz. When compared with other designs using advanced processes, the proposed DCO demonstrated the best power-to-frequency ratio. Therefore, it can output a signal at the required frequency more efficiently in terms of power consumption. Additionally, because the proposed DCO uses digital logic gates only, a cell-based design flow can be implemented. Hence, the proposed DCO is not only easy to implement in different processes but also easy to integrate with other digital circuits.https://www.mdpi.com/1424-8220/21/4/1377digitally controlled oscillator (DCO)clock generatorall digitallow powerlow complexity |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Duo Sheng Wei-Yen Chen Hao-Ting Huang Li Tai |
spellingShingle |
Duo Sheng Wei-Yen Chen Hao-Ting Huang Li Tai Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation Sensors digitally controlled oscillator (DCO) clock generator all digital low power low complexity |
author_facet |
Duo Sheng Wei-Yen Chen Hao-Ting Huang Li Tai |
author_sort |
Duo Sheng |
title |
Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation |
title_short |
Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation |
title_full |
Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation |
title_fullStr |
Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation |
title_full_unstemmed |
Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation |
title_sort |
digitally controlled oscillator with high timing resolution and low complexity for clock generation |
publisher |
MDPI AG |
series |
Sensors |
issn |
1424-8220 |
publishDate |
2021-02-01 |
description |
This paper presents a digitally controlled oscillator (DCO) with a low-complexity circuit structure that combines multiple delay circuits to achieve a high timing resolution and wide output frequency range simultaneously while also significantly reducing the overall power consumption. A 0.18 µm complementary metal–oxide–semiconductor standard process was used for the design, and measurements showed that the chip had a minimum controllable timing resolution of 4.81 ps and power consumption of 142 µW with an output signal of 364 MHz. When compared with other designs using advanced processes, the proposed DCO demonstrated the best power-to-frequency ratio. Therefore, it can output a signal at the required frequency more efficiently in terms of power consumption. Additionally, because the proposed DCO uses digital logic gates only, a cell-based design flow can be implemented. Hence, the proposed DCO is not only easy to implement in different processes but also easy to integrate with other digital circuits. |
topic |
digitally controlled oscillator (DCO) clock generator all digital low power low complexity |
url |
https://www.mdpi.com/1424-8220/21/4/1377 |
work_keys_str_mv |
AT duosheng digitallycontrolledoscillatorwithhightimingresolutionandlowcomplexityforclockgeneration AT weiyenchen digitallycontrolledoscillatorwithhightimingresolutionandlowcomplexityforclockgeneration AT haotinghuang digitallycontrolledoscillatorwithhightimingresolutionandlowcomplexityforclockgeneration AT litai digitallycontrolledoscillatorwithhightimingresolutionandlowcomplexityforclockgeneration |
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