A Novel Integrated Structure for Three Phase Digital SPWM Waveform Generator with VVVF Control
This paper presents a novel structure and design of a full custom digital chip that generates the three-phase sinusoidal pulse width modulation (SPWM) waveform with variable voltage and variable frequency (VVVF) control. The voltage and frequency are simultaneously controlled with constant v/f ratio...
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Editura Universităţii din Oradea
2017-05-01
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doaj-452d4620b75c4df9be1d20a4fdd6c3272020-11-24T22:46:15ZengEditura Universităţii din OradeaJournal of Electrical and Electronics Engineering1844-60352067-21282017-05-011015358A Novel Integrated Structure for Three Phase Digital SPWM Waveform Generator with VVVF ControlNASROLLAHI Reza0HASSANZADEH Alireza1HADIDI Khayrollah2Islamic Azad University Central Tehran Branch, IranShahid Beheshti University, IranUrmia University, IranThis paper presents a novel structure and design of a full custom digital chip that generates the three-phase sinusoidal pulse width modulation (SPWM) waveform with variable voltage and variable frequency (VVVF) control. The voltage and frequency are simultaneously controlled with constant v/f ratio. The frequency range is from 5Hz up to 75Hz and the voltage also changes proportionally. In this way, three modes including fix, manual setting and closed loop control have been defined that provide simple implementation and high flexibility for the IC. The synchronous modulation is used (p=63) in which there are 63 pulses for every complete sinusoidal cycle. Considering the dead time between the complementary signals that reach the switches on an inverter’s leg, the result of the simulation shows the elimination of low order harmonics with value of 40 dB for each of the SPWM outputs. The method used for generating sinusoidal waveform and variable frequency generator circuit and also the approach taken for controlling amplitude and frequency simultaneously are completely novel. The chip has been designed using 0.35µm CMOS standard technology with approximately 15000 transistors on chip. The complete circuit consumes 680µm × 570µm of chip area and 48mW of power dissipation.http://electroinf.uoradea.ro/images/articles/CERCETARE/Reviste/JEEE/JEEE_V10_N1_MAY_2017/10paper0709HASSANZADEH_Alireza.pdfInverterSPWMVVVF |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
NASROLLAHI Reza HASSANZADEH Alireza HADIDI Khayrollah |
spellingShingle |
NASROLLAHI Reza HASSANZADEH Alireza HADIDI Khayrollah A Novel Integrated Structure for Three Phase Digital SPWM Waveform Generator with VVVF Control Journal of Electrical and Electronics Engineering Inverter SPWM VVVF |
author_facet |
NASROLLAHI Reza HASSANZADEH Alireza HADIDI Khayrollah |
author_sort |
NASROLLAHI Reza |
title |
A Novel Integrated Structure for Three Phase Digital SPWM Waveform Generator with VVVF Control |
title_short |
A Novel Integrated Structure for Three Phase Digital SPWM Waveform Generator with VVVF Control |
title_full |
A Novel Integrated Structure for Three Phase Digital SPWM Waveform Generator with VVVF Control |
title_fullStr |
A Novel Integrated Structure for Three Phase Digital SPWM Waveform Generator with VVVF Control |
title_full_unstemmed |
A Novel Integrated Structure for Three Phase Digital SPWM Waveform Generator with VVVF Control |
title_sort |
novel integrated structure for three phase digital spwm waveform generator with vvvf control |
publisher |
Editura Universităţii din Oradea |
series |
Journal of Electrical and Electronics Engineering |
issn |
1844-6035 2067-2128 |
publishDate |
2017-05-01 |
description |
This paper presents a novel structure and design of a full custom digital chip that generates the three-phase sinusoidal pulse width modulation (SPWM) waveform with variable voltage and variable frequency (VVVF) control. The voltage and frequency are simultaneously controlled with constant v/f ratio. The frequency range is from 5Hz up to 75Hz and the voltage also changes proportionally. In this way, three modes including fix, manual setting and closed loop control have been defined that provide simple implementation and high flexibility for the IC. The synchronous modulation is used (p=63) in which there are 63 pulses for every complete sinusoidal cycle. Considering the dead time between the complementary signals that reach the switches on an inverter’s leg, the result of the simulation shows the elimination of low order harmonics with value of 40 dB for each of the SPWM outputs. The method used for generating sinusoidal waveform and variable frequency generator circuit and also the approach taken for controlling amplitude and frequency simultaneously are completely novel. The chip has been designed using 0.35µm CMOS standard technology with approximately 15000 transistors on chip. The complete circuit consumes 680µm × 570µm of chip area and 48mW of power dissipation. |
topic |
Inverter SPWM VVVF |
url |
http://electroinf.uoradea.ro/images/articles/CERCETARE/Reviste/JEEE/JEEE_V10_N1_MAY_2017/10paper0709HASSANZADEH_Alireza.pdf |
work_keys_str_mv |
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