Multidimensional Systolic Arrays of LMS Algorithm Adaptive (FIR) Digital Filters

• Main Authors: Riyadh A. H. AL-Helali, Bakir A. R. Al-Hashemy
• Format: Article
• Language: English
• Published: Al-Khwarizmi College of Engineering – University of Baghdad 2009-03-01
• Series: Al-Khawarizmi Engineering Journal
• Online Access: http://alkej.uobaghdad.edu.iq/index.php/alkej/article/view/522

A multidimensional systolic arrays realization of LMS algorithm by a method of mapping regular algorithm onto processor array, are designed. They are based on appropriately selected 1-D systolic array filter that depends on the inner product sum systolic implementation. Various arrays may be derived that exhibit a regular arrangement of the cells (processors) and local interconnection pattern, which are important for VLSI implementation. It reduces latency time and increases the throughput rate in comparison to classical 1-D systolic arrays. The 3-D multilayered array consists of 2-D layers, which are connected with each other only by edges. Such arrays for LMS-based adaptive (FIR) filter may be opposed the fundamental requirements of fast convergence rate in most adaptive filter applications.