A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors

This paper presents a dynamic range (DR) enhanced readout technique with a two-step time-to-digital converter (TDC) for high speed linear CMOS image sensors. A multi-capacitor and self-regulated capacitive trans-impedance amplifier (CTIA) structure is employed to extend the dynamic range. The gain...

Full description

Bibliographic Details
Main Authors: Zhiyuan Gao, Congjie Yang, Jiangtao Xu, Kaiming Nie
Format: Article
Language:English
Published: MDPI AG 2015-11-01
Series:Sensors
Subjects:
Online Access:http://www.mdpi.com/1424-8220/15/11/28224
id doaj-53a54282eae9471cbbe9cb849d93ec35
record_format Article
spelling doaj-53a54282eae9471cbbe9cb849d93ec352020-11-25T00:51:37ZengMDPI AGSensors1424-82202015-11-011511282242824310.3390/s151128224s151128224A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image SensorsZhiyuan Gao0Congjie Yang1Jiangtao Xu2Kaiming Nie3School of Electronic Information Engineering, Tianjin University, 92 Weijin Road, Nankai District, Tianjin 300072, ChinaSchool of Electronic Information Engineering, Tianjin University, 92 Weijin Road, Nankai District, Tianjin 300072, ChinaSchool of Electronic Information Engineering, Tianjin University, 92 Weijin Road, Nankai District, Tianjin 300072, ChinaSchool of Electronic Information Engineering, Tianjin University, 92 Weijin Road, Nankai District, Tianjin 300072, ChinaThis paper presents a dynamic range (DR) enhanced readout technique with a two-step time-to-digital converter (TDC) for high speed linear CMOS image sensors. A multi-capacitor and self-regulated capacitive trans-impedance amplifier (CTIA) structure is employed to extend the dynamic range. The gain of the CTIA is auto adjusted by switching different capacitors to the integration node asynchronously according to the output voltage. A column-parallel ADC based on a two-step TDC is utilized to improve the conversion rate. The conversion is divided into coarse phase and fine phase. An error calibration scheme is also proposed to correct quantization errors caused by propagation delay skew within −Tclk~+Tclk. A linear CMOS image sensor pixel array is designed in the 0.13 μm CMOS process to verify this DR-enhanced high speed readout technique. The post simulation results indicate that the dynamic range of readout circuit is 99.02 dB and the ADC achieves 60.22 dB SNDR and 9.71 bit ENOB at a conversion rate of 2 MS/s after calibration, with 14.04 dB and 2.4 bit improvement, compared with SNDR and ENOB of that without calibration.http://www.mdpi.com/1424-8220/15/11/28224CMOS image sensorCTIAwide dynamic rangetwo-step TDCerror calibration
collection DOAJ
language English
format Article
sources DOAJ
author Zhiyuan Gao
Congjie Yang
Jiangtao Xu
Kaiming Nie
spellingShingle Zhiyuan Gao
Congjie Yang
Jiangtao Xu
Kaiming Nie
A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors
Sensors
CMOS image sensor
CTIA
wide dynamic range
two-step TDC
error calibration
author_facet Zhiyuan Gao
Congjie Yang
Jiangtao Xu
Kaiming Nie
author_sort Zhiyuan Gao
title A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors
title_short A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors
title_full A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors
title_fullStr A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors
title_full_unstemmed A Dynamic Range Enhanced Readout Technique with a Two-Step TDC for High Speed Linear CMOS Image Sensors
title_sort dynamic range enhanced readout technique with a two-step tdc for high speed linear cmos image sensors
publisher MDPI AG
series Sensors
issn 1424-8220
publishDate 2015-11-01
description This paper presents a dynamic range (DR) enhanced readout technique with a two-step time-to-digital converter (TDC) for high speed linear CMOS image sensors. A multi-capacitor and self-regulated capacitive trans-impedance amplifier (CTIA) structure is employed to extend the dynamic range. The gain of the CTIA is auto adjusted by switching different capacitors to the integration node asynchronously according to the output voltage. A column-parallel ADC based on a two-step TDC is utilized to improve the conversion rate. The conversion is divided into coarse phase and fine phase. An error calibration scheme is also proposed to correct quantization errors caused by propagation delay skew within −Tclk~+Tclk. A linear CMOS image sensor pixel array is designed in the 0.13 μm CMOS process to verify this DR-enhanced high speed readout technique. The post simulation results indicate that the dynamic range of readout circuit is 99.02 dB and the ADC achieves 60.22 dB SNDR and 9.71 bit ENOB at a conversion rate of 2 MS/s after calibration, with 14.04 dB and 2.4 bit improvement, compared with SNDR and ENOB of that without calibration.
topic CMOS image sensor
CTIA
wide dynamic range
two-step TDC
error calibration
url http://www.mdpi.com/1424-8220/15/11/28224
work_keys_str_mv AT zhiyuangao adynamicrangeenhancedreadouttechniquewithatwosteptdcforhighspeedlinearcmosimagesensors
AT congjieyang adynamicrangeenhancedreadouttechniquewithatwosteptdcforhighspeedlinearcmosimagesensors
AT jiangtaoxu adynamicrangeenhancedreadouttechniquewithatwosteptdcforhighspeedlinearcmosimagesensors
AT kaimingnie adynamicrangeenhancedreadouttechniquewithatwosteptdcforhighspeedlinearcmosimagesensors
AT zhiyuangao dynamicrangeenhancedreadouttechniquewithatwosteptdcforhighspeedlinearcmosimagesensors
AT congjieyang dynamicrangeenhancedreadouttechniquewithatwosteptdcforhighspeedlinearcmosimagesensors
AT jiangtaoxu dynamicrangeenhancedreadouttechniquewithatwosteptdcforhighspeedlinearcmosimagesensors
AT kaimingnie dynamicrangeenhancedreadouttechniquewithatwosteptdcforhighspeedlinearcmosimagesensors
_version_ 1725244716423839744