A 12-bit 40-MS/s SAR ADC with Calibration-Less Switched Capacitive Reference Driver

• Main Authors: Hyungyu Ju, Sewon Lee, Minjae Lee
• Format: Article
• Language: English
• Published: MDPI AG 2020-11-01
• Series: Electronics
• Subjects: capacitive reference driver; MOS capacitor; SAR ADC; signal-dependent error; switching energy
• Online Access: https://www.mdpi.com/2079-9292/9/11/1854

This paper presents a switched capacitive reference driver (SCRD) with a low-energy switching scheme. In order to reduce the performance degradation resulting from a signal-dependent voltage drop in a capacitive reference driver (CRD) without increasing the capacitance (C_REF) of a CRD, the proposed SCRD utilizes the CRD for LSB conversion cycles. In MSB conversion cycles, a supply voltage is used as a reference voltage to save on area and power consumption. As such, the proposed SCRD significantly relaxes the required C_REF, and does not necessitate bit weight calibration or compensation requiring an auxiliary capacitor-based digital-to-analog converter (CDAC). To evaluate the proposed SCRD, a prototype 12-bit 40-MS/s SAR ADC is fabricated in a 65 nm CMOS process. With near Nyquist frequency, the measured spurious-free dynamic range (SFDR) of the SAR ADC with the SCRD is 80.6 dB, which is about a 16 dB improvement from the SFDR of a SAR ADC with a CRD only.