Analysis of the Multi-Steps Package (MSP) for Series-Connected SiC-MOSFETs

In this paper, a multi-step packaging (MSP) concept for series-connected SiC-MOSFETs is analyzed. The parasitic capacitance generated by the dielectric isolation of each device in the stack has a significant impact on the dynamic behavior of SiC devices, which impacts the voltage-sharing performance...

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Bibliographic Details
Main Authors: Luciano F. S. Alves, Pierre Lefranc, Pierre-Olivier Jeannin, Benoit Sarrazin, Jean-Christophe Crebier
Format: Article
Language:English
Published: MDPI AG 2020-08-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/9/9/1341

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