New Design of PI Regulator Circuit Based on Three-Terminal Memristors

• Main Authors: Zhenglong Xia, Zhi Zhou, Josep M. Guerrero, Qiang Zhao
• Format: Article
• Language: English
• Published: IEEE 2019-01-01
• Series: IEEE Access
• Subjects: Memristors (MRs); proportional-integral (PI) controllers; junction gate field-effect transistor (JFET); current feedback operational amplifier (CFOA); pinched hysteresis loop (PHL)
• Online Access: https://ieeexplore.ieee.org/document/8824111/

Three-terminal memristors (MRs), extended from two-terminal ones, have been reported to have strong controllability and thus a wide application potential. In this paper, two three-terminal MR emulators are designed based on the junction gate field-effect transistor (JFET) and the operational amplifier (op amp), respectively, aiming to control the memductance quantitatively by adjusting the voltage applied on the third terminal. To obtain adjustable control parameters, a proportional-integral (PI) controller was designed based on the op amp-based three-terminal MR emulator. Then, the proposed emulators and controller were simulated repeatedly. The simulated results agree well with the theoretical analysis, revealing the good performance and feasibility of our design. The research findings shed new light on improving the controllability of controllers.