Recent Advances in FPGA Reverse Engineering
In this paper, we review recent advances in reverse engineering with an emphasis on FPGA devices and experimentally verified advantages and limitations of reverse engineering tools. The paper first introduces essential components for programming Xilinx FPGAs (Xilinx, San Jose, CA, USA), such as Xili...
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doaj-9768d561e5da462ba11f949f6dbb09962020-11-24T22:09:11ZengMDPI AGElectronics2079-92922018-10-0171024610.3390/electronics7100246electronics7100246Recent Advances in FPGA Reverse EngineeringHoyoung Yu0Hansol Lee1Sangil Lee2Youngmin Kim3Hyung-Min Lee4School of Computer and Information Engineering, Kwangwoon University, Seoul 01897, KoreaSchool of Electrical Engineering, Korea University, Seoul 02841, KoreaSchool of Electrical Engineering, Korea University, Seoul 02841, KoreaSchool of Computer and Information Engineering, Kwangwoon University, Seoul 01897, KoreaSchool of Electrical Engineering, Korea University, Seoul 02841, KoreaIn this paper, we review recent advances in reverse engineering with an emphasis on FPGA devices and experimentally verified advantages and limitations of reverse engineering tools. The paper first introduces essential components for programming Xilinx FPGAs (Xilinx, San Jose, CA, USA), such as Xilinx Design Language (XDL), XDL Report (XDLRC), and bitstream. Then, reverse engineering tools (Debit, BIL, and Bit2ncd), which extract the bitstream from the external memory to the FPGA and utilize it to recover the netlist, are reviewed, and their limitations are discussed. This paper also covers supplementary tools (Rapidsmith) that can adjust the FPGA design flow to support reverse engineering. Finally, reverse engineering projects for non-Xilinx products, such as Lattice FPGAs (Icestorm) and Altera FPGAs (QUIP), are introduced to compare the reverse engineering capabilities by various commercial FPGA products.http://www.mdpi.com/2079-9292/7/10/246reverse engineeringFPGAhardware securitybitstreamnetlistsXilinx |
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language |
English |
format |
Article |
sources |
DOAJ |
author |
Hoyoung Yu Hansol Lee Sangil Lee Youngmin Kim Hyung-Min Lee |
spellingShingle |
Hoyoung Yu Hansol Lee Sangil Lee Youngmin Kim Hyung-Min Lee Recent Advances in FPGA Reverse Engineering Electronics reverse engineering FPGA hardware security bitstream netlists Xilinx |
author_facet |
Hoyoung Yu Hansol Lee Sangil Lee Youngmin Kim Hyung-Min Lee |
author_sort |
Hoyoung Yu |
title |
Recent Advances in FPGA Reverse Engineering |
title_short |
Recent Advances in FPGA Reverse Engineering |
title_full |
Recent Advances in FPGA Reverse Engineering |
title_fullStr |
Recent Advances in FPGA Reverse Engineering |
title_full_unstemmed |
Recent Advances in FPGA Reverse Engineering |
title_sort |
recent advances in fpga reverse engineering |
publisher |
MDPI AG |
series |
Electronics |
issn |
2079-9292 |
publishDate |
2018-10-01 |
description |
In this paper, we review recent advances in reverse engineering with an emphasis on FPGA devices and experimentally verified advantages and limitations of reverse engineering tools. The paper first introduces essential components for programming Xilinx FPGAs (Xilinx, San Jose, CA, USA), such as Xilinx Design Language (XDL), XDL Report (XDLRC), and bitstream. Then, reverse engineering tools (Debit, BIL, and Bit2ncd), which extract the bitstream from the external memory to the FPGA and utilize it to recover the netlist, are reviewed, and their limitations are discussed. This paper also covers supplementary tools (Rapidsmith) that can adjust the FPGA design flow to support reverse engineering. Finally, reverse engineering projects for non-Xilinx products, such as Lattice FPGAs (Icestorm) and Altera FPGAs (QUIP), are introduced to compare the reverse engineering capabilities by various commercial FPGA products. |
topic |
reverse engineering FPGA hardware security bitstream netlists Xilinx |
url |
http://www.mdpi.com/2079-9292/7/10/246 |
work_keys_str_mv |
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