The Area-Latency Symbiosis: Towards Improved Serial Encryption Circuits
The bit-sliding paper of Jean et al. (CHES 2017) showed that the smallest-size circuit for SPN based block ciphers such as AES, SKINNY and PRESENT can be achieved via bit-serial implementations. Their technique decreases the bit size of the datapath and naturally leads to a significant loss in late...
Main Authors: | Fatih Balli, Andrea Caforio, Subhadeep Banik |
---|---|
Format: | Article |
Language: | English |
Published: |
Ruhr-Universität Bochum
2020-12-01
|
Series: | Transactions on Cryptographic Hardware and Embedded Systems |
Subjects: | |
Online Access: | https://tches.iacr.org/index.php/TCHES/article/view/8734 |
Similar Items
-
The Area-Latency Symbiosis: Towards Improved Serial Encryption Circuits
by: Fatih Balli, et al.
Published: (2020-12-01) -
SUNDAE: Small Universal Deterministic Authenticated Encryption for the Internet of Things
by: Subhadeep Banik, et al.
Published: (2018-09-01) -
Pyjamask: Block Cipher and Authenticated Encryption with Highly Efficient Masked Implementation
by: Dahmun Goudarzi, et al.
Published: (2020-06-01) -
Duel of the Titans: The Romulus and Remus Families of Lightweight AEAD Algorithms
by: Tetsu Iwata, et al.
Published: (2020-05-01) -
Lightweight Authenticated Encryption Mode of Operation for Tweakable Block Ciphers
by: Yusuke Naito, et al.
Published: (2019-11-01)