Reduction of circuit devices in symmetrical voltage source multilevel inverter based on series connection of basic unit cells

• Main Authors: Kishor Thakre, Kanungo Barada Mohanty, Aditi Chatterjee
• Format: Article
• Language: English
• Published: Elsevier 2018-12-01
• Series: Alexandria Engineering Journal
• Online Access: http://www.sciencedirect.com/science/article/pii/S1110016818300681

In this study, a novel modular configuration for symmetrical multilevel inverter is proposed. The proposed topology consists of basic unit cells which are enclosed by series connected six power semiconductor switches. In contrast with contemporary topologies, the proposed topology offers same voltage level with a lower number of power switches thereby reducing the number of gate driver circuits, which in turn reduce the size and cost of the inverter circuit. The proposed topology is efficient to generate 9 and 11-levels of output voltage with only ten power semiconductor switches. In addition, the proposed topology offers less number of ON state switches to reduce the power loss. The proposed topology using universal switching scheme based on modified sinusoidal pulse width modulation is verified through simulation and feasibility of topology has been validates experimentally on laboratory prototype using dSPACE real-time controller. Keywords: Multilevel inverter, Reduced number of switches, Modified sinusoidal pulse width modulation, Total harmonic distortion (THD)