| Summary: | This paper presents a high-resolution, high-gain, wide-input-output-swing open-loop charge steering amplifier for pipelined successive-approximation-register (SAR) analog-to-digital converter (ADC). Compared to prior charge-steering amplifiers where every transistor is in the saturation region, the proposed amplifier uses cascode input transistors operating in the linear region, which improves its linearity and input swing. To increase the gain, the amplification time is extended by charging the load capacitance through PMOS transistors. Besides, the gain-boost structure is used to adjust the drain voltage of input transistors operating in the linear region, so that nearly the same gain at different process corners is realized. We designed two versions of the proposed amplifier. Both are in a 40-nm CMOS technology, and both achieve 7.6-bit ENOB accuracy. Compared to prior charge-steering amplifiers, ENOB is increased by 1.6-bits; gain is increased by 3.2 times (or even larger); and output swing is increased by 3.6 times.
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