A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications
An energy efficient, low-power 10-bit asynchronous successive approximation register (SAR) analog-to-digital (ADC) converter with the sampling frequency of 8 MS/s is presented for IEEE 802.15.1 IoT sensor based applications. An improved common mode charge redistribution algorithm is proposed for bin...
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doaj-bb2768845ad24bd98aad17c3d3579e062021-03-30T02:49:35ZengIEEEIEEE Access2169-35362020-01-018858698587910.1109/ACCESS.2020.29927509088158A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based ApplicationsDeeksha Verma0Khuram Shehzad1Danial Khan2https://orcid.org/0000-0003-4010-2637Qurat Ul Ain3Sung Jin Kim4Dongsoo Lee5Younggun Pu6Minjae Lee7Keum Cheol Hwang8https://orcid.org/0000-0002-8074-1137Youngoo Yang9https://orcid.org/0000-0003-3463-0687Kang-Yoon Lee10https://orcid.org/0000-0001-9777-6953Department of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaDepartment of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaDepartment of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaDepartment of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaDepartment of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaSamsung Electronics, Suwon, South KoreaDepartment of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaSchool of Electrical Engineering and Computer Science, Gwangju Institure of Science and Technology, Gwangju, South KoreaDepartment of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaDepartment of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaDepartment of Electrical and Computer Engineering, Sungkyunkwan University, Natural Science Campus, Suwon-si, South KoreaAn energy efficient, low-power 10-bit asynchronous successive approximation register (SAR) analog-to-digital (ADC) converter with the sampling frequency of 8 MS/s is presented for IEEE 802.15.1 IoT sensor based applications. An improved common mode charge redistribution algorithm is proposed for binary weighted SAR ADC. The proposed method uses available common mode voltage (VCM) level for SAR ADC conversion, and this method reduces the switching power by more than 12% without any additional DAC driver as compared to merged capacitor switching (MCS). Mathematical analysis of the proposed switching scheme results in the lower or equal power consumption for every digital code as compared to MCS. A two stage dynamic latched comparator with adaptive power control (APC) technique is used to optimize the overall efficiency. Furthermore, to minimize the digital part power consumption, a modified asynchronous SAR logic with digitally controlled delay cells is proposed. High efficiency with low power consumption makes it suitable for low power devices especially for IEEE 802.15.1 IoT sensor based applications. The proposed prototype is implemented using 1P6M 55 nm complementary metal-oxide-semiconductor (CMOS) technology. The measurement results that the proposed circuit achieves are 9.3 effective number of bits (ENOB) with signal-to-noise and distortion ratio (SNDR) of 58.05 dB at a sampling rate of 8 MS/s. The power consumption of SAR ADC is 45 μW when operated at 1 V power supply.https://ieeexplore.ieee.org/document/9088158/Adaptive power control (APC)asynchronous logicBluetooth low energy (BLE)capacitive DAC (CDAC)IEEE 802.15.1 IoT sensorslow power consumption |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Deeksha Verma Khuram Shehzad Danial Khan Qurat Ul Ain Sung Jin Kim Dongsoo Lee Younggun Pu Minjae Lee Keum Cheol Hwang Youngoo Yang Kang-Yoon Lee |
spellingShingle |
Deeksha Verma Khuram Shehzad Danial Khan Qurat Ul Ain Sung Jin Kim Dongsoo Lee Younggun Pu Minjae Lee Keum Cheol Hwang Youngoo Yang Kang-Yoon Lee A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications IEEE Access Adaptive power control (APC) asynchronous logic Bluetooth low energy (BLE) capacitive DAC (CDAC) IEEE 802.15.1 IoT sensors low power consumption |
author_facet |
Deeksha Verma Khuram Shehzad Danial Khan Qurat Ul Ain Sung Jin Kim Dongsoo Lee Younggun Pu Minjae Lee Keum Cheol Hwang Youngoo Yang Kang-Yoon Lee |
author_sort |
Deeksha Verma |
title |
A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications |
title_short |
A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications |
title_full |
A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications |
title_fullStr |
A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications |
title_full_unstemmed |
A Design of 8 fJ/Conversion-Step 10-bit 8MS/s Low Power Asynchronous SAR ADC for IEEE 802.15.1 IoT Sensor Based Applications |
title_sort |
design of 8 fj/conversion-step 10-bit 8ms/s low power asynchronous sar adc for ieee 802.15.1 iot sensor based applications |
publisher |
IEEE |
series |
IEEE Access |
issn |
2169-3536 |
publishDate |
2020-01-01 |
description |
An energy efficient, low-power 10-bit asynchronous successive approximation register (SAR) analog-to-digital (ADC) converter with the sampling frequency of 8 MS/s is presented for IEEE 802.15.1 IoT sensor based applications. An improved common mode charge redistribution algorithm is proposed for binary weighted SAR ADC. The proposed method uses available common mode voltage (VCM) level for SAR ADC conversion, and this method reduces the switching power by more than 12% without any additional DAC driver as compared to merged capacitor switching (MCS). Mathematical analysis of the proposed switching scheme results in the lower or equal power consumption for every digital code as compared to MCS. A two stage dynamic latched comparator with adaptive power control (APC) technique is used to optimize the overall efficiency. Furthermore, to minimize the digital part power consumption, a modified asynchronous SAR logic with digitally controlled delay cells is proposed. High efficiency with low power consumption makes it suitable for low power devices especially for IEEE 802.15.1 IoT sensor based applications. The proposed prototype is implemented using 1P6M 55 nm complementary metal-oxide-semiconductor (CMOS) technology. The measurement results that the proposed circuit achieves are 9.3 effective number of bits (ENOB) with signal-to-noise and distortion ratio (SNDR) of 58.05 dB at a sampling rate of 8 MS/s. The power consumption of SAR ADC is 45 μW when operated at 1 V power supply. |
topic |
Adaptive power control (APC) asynchronous logic Bluetooth low energy (BLE) capacitive DAC (CDAC) IEEE 802.15.1 IoT sensors low power consumption |
url |
https://ieeexplore.ieee.org/document/9088158/ |
work_keys_str_mv |
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