| Summary: | This paper proposes a novel VLSI architecture of GNSS acquisition engine based on short-time correlation combined with an FFT scheme. The architecture supports multi-constellation systems and multi-frequency satellite signals flexibly by the manner of time-division multiplexing. The supported signals include GPS, BDS, GLONASS, GALILEO, QZSS, IRNSS, and SBAS. Compared with other direct acquisition structures, the search efficiency of the acquisition engine is improved by using the IF playback structure. Based on the characteristics of L1C and B1C signal spread spectrum codes, an efficient generation method and the circuit structure of Legendre sequence which is compatible with L1C and B1C spread spectrum codes are proposed. It can effectively reduce the die area of the spread spectrum code generator and the generation time of the L1C/B1C spread spectrum code. Combining with the acquisition scheme adopted in this paper, the structure of the short-time correlators’ array is optimized, and the maximum clock frequency of the acquisition engine is significantly improved. The acquisition engine proposed in this paper is implemented in a 55-nm CMOS technology. The system occupied a silicon area of 2.1 mm<sup>2</sup> and consumes only 72.02-mW power while realizing the maximum clock frequency at about 333.33 MHz.
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