The development of universal time series signal board base on CPLD

In view of the disadvantages of the time series signal board,which is realized by logic combination with multiple IC chips,such as complex time series signal synchronization circuit,low synchronization accuracy,unadjustable pulse period and pulse width,and difficult circuit modification.This paper p...

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Bibliographic Details
Main Author: Lv Wenfa
Format: Article
Language:zho
Published: National Computer System Engineering Research Institute of China 2020-03-01
Series:Dianzi Jishu Yingyong
Subjects:
Online Access:http://www.chinaaet.com/article/3000116540
Description
Summary:In view of the disadvantages of the time series signal board,which is realized by logic combination with multiple IC chips,such as complex time series signal synchronization circuit,low synchronization accuracy,unadjustable pulse period and pulse width,and difficult circuit modification.This paper presents a design idea and implementation method of time series signal board based on CPLD,which can generate time series signals of different periods,improve the synchronization accuracy of time series signals,adjust the pulse width, send or receive multiple differential time series signals.It has the characteristics of on-line updating logic,high synchronization accuracy,flexible program control,simple circuit and high reliability.
ISSN:0258-7998