Implementing Cepstral Filtering Technique using Gabor Filters

Cepstral filtering technique is applied on an interlaced image, the pattern similar to that which is found in layer IV of Primate Visual Cortex. It involves Power spectrum in computation, which is square of absolute of Fast Fourier Transform (FFT), is a complicated and hardware unfriendly. We propos...

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Bibliographic Details
Main Authors: Sheena Sharma, Harshit Agarwal, C.M. Markan
Format: Article
Language:English
Published: Computer Vision Center Press 2012-03-01
Series:ELCVIA Electronic Letters on Computer Vision and Image Analysis
Subjects:
Online Access:https://elcvia.cvc.uab.es/article/view/432
Description
Summary:Cepstral filtering technique is applied on an interlaced image, the pattern similar to that which is found in layer IV of Primate Visual Cortex. It involves Power spectrum in computation, which is square of absolute of Fast Fourier Transform (FFT), is a complicated and hardware unfriendly. We propose an algorithm in which Gabor filters, instead of Power Spectrum, are applied to an interlaced image in the Cepstral algorithm. This scheme makes it hardware friendly as it gives the flexibility of working with modules which can be imitated in hardware. Building a FFT module is a tough task in analog circuit but determining Gabor energy, an alternative to it, can be achieved by elementary circuits. The Phase, Energy Models and other methods, use multi-lambda Gabor filters to compute disparity. The proposed method uses sum of absolute difference to choose a single Gabor filter of appropriate lambda that fits to find the disparity. The algorithm inherits the quality of both Gabor filter and Ocular Dominance Pattern and hence a biologically inspired and suitable for hardware realization. The proposed algorithm has been implemented on the test data image. A hardware scheme has also been proposed that can be used to estimate disparity and the idea can be extended in building complex modules that can perform real time - real image operations with a handful of resources as compared to employing complex digital FPGAs and CPLDs.
ISSN:1577-5097