DoS Attack Detection and Path Collision Localization in NoC-Based MPSoC Architectures

• Main Authors: Cesar Giovanni Chaves, Siavoosh Payandeh Azad, Thomas Hollstein, Johanna Sepúlveda
• Format: Article
• Language: English
• Published: MDPI AG 2019-02-01
• Series: Journal of Low Power Electronics and Applications
• Subjects: denial of service attacks; network-on-chip; distributed online monitoring; multi-processor system-on-chip; security
• Online Access: https://www.mdpi.com/2079-9268/9/1/7

Denial of Service (DoS) attacks are an increasing threat for Multiprocessor System-on-Chip (MPSoC) architectures. By exploiting the shared resources on the chip, an attacker is able to prevent completion or degrade the performance of a task. This is extremely dangerous for MPSoCs used in critical applications. The Network-on-Chip (NoC), as a central MPSoC infrastructure, is exposed to this attack. In order to maintain communication availability, NoCs should be enhanced with an effective and precise attack detection mechanism that allows the triggering of effective attack mitigation mechanisms. Previous research works demonstrate DoS attacks on NoCs and propose detection methods being implemented in NoC routers. These countermeasures typically led to a significantly increased router complexity and to a high degradation of the MPSoC’s performance. To this end, we present two contributions. First, we provide an analysis of information that helps to narrow down the location of the attacker in the MPSoC, achieving up to a 69% search space reduction for locating the attacker. Second, we propose a low cost mechanism for detecting the location and direction of the interference, by enhancing the communication packet structure and placing communication degradation monitors in the NoC routers. Our experiments show that our NoC router architecture detects single-source DoS attacks and determines, with high precision, the location and direction of the collision, while incurring a low area and power overhead.