New Techniques for Implementation of Hardware Algorithms inside FPGA Circuits

This work presents a less known theoretical method for the synthesis of complex hardware automata by using the transition matrix, together with a new practical method for visual implementation inside FPGA circuits, with library schematic symbols from the "Altium Designer" software enviro...

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Main Author: IOAN, A. D.
Format: Article
Language:English
Published: Stefan cel Mare University of Suceava 2010-05-01
Series:Advances in Electrical and Computer Engineering
Subjects:
Online Access:http://dx.doi.org/10.4316/AECE.2010.02003
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spelling doaj-d66daad2ad1540e6a1ff126a3b4fe6802020-11-25T00:27:28ZengStefan cel Mare University of SuceavaAdvances in Electrical and Computer Engineering1582-74451844-76002010-05-01102162310.4316/AECE.2010.02003New Techniques for Implementation of Hardware Algorithms inside FPGA CircuitsIOAN, A. D.This work presents a less known theoretical method for the synthesis of complex hardware automata by using the transition matrix, together with a new practical method for visual implementation inside FPGA circuits, with library schematic symbols from the "Altium Designer" software environment. Because these techniques need to be presented by example, the classical shift and add unsigned multiply algorithm was chosen for review. Obviously, this is not the most efficient algorithm, but it serves the declared purpose and it can still be used in a real system when the hardware must be minimal. Furthermore, an essential correction to the optimal version of this algorithm was made. The techniques are exemplified by doing an original implementation: starting from the initial organigram, passing through transition matrix synthesis stage and reaching to the final fully functional system on a "Digilent Spartan-3" FPGA development board, which includes the user interface too. http://dx.doi.org/10.4316/AECE.2010.02003algorithm organigramexecution sectionsequencertransition matrixuser interface
collection DOAJ
language English
format Article
sources DOAJ
author IOAN, A. D.
spellingShingle IOAN, A. D.
New Techniques for Implementation of Hardware Algorithms inside FPGA Circuits
Advances in Electrical and Computer Engineering
algorithm organigram
execution section
sequencer
transition matrix
user interface
author_facet IOAN, A. D.
author_sort IOAN, A. D.
title New Techniques for Implementation of Hardware Algorithms inside FPGA Circuits
title_short New Techniques for Implementation of Hardware Algorithms inside FPGA Circuits
title_full New Techniques for Implementation of Hardware Algorithms inside FPGA Circuits
title_fullStr New Techniques for Implementation of Hardware Algorithms inside FPGA Circuits
title_full_unstemmed New Techniques for Implementation of Hardware Algorithms inside FPGA Circuits
title_sort new techniques for implementation of hardware algorithms inside fpga circuits
publisher Stefan cel Mare University of Suceava
series Advances in Electrical and Computer Engineering
issn 1582-7445
1844-7600
publishDate 2010-05-01
description This work presents a less known theoretical method for the synthesis of complex hardware automata by using the transition matrix, together with a new practical method for visual implementation inside FPGA circuits, with library schematic symbols from the "Altium Designer" software environment. Because these techniques need to be presented by example, the classical shift and add unsigned multiply algorithm was chosen for review. Obviously, this is not the most efficient algorithm, but it serves the declared purpose and it can still be used in a real system when the hardware must be minimal. Furthermore, an essential correction to the optimal version of this algorithm was made. The techniques are exemplified by doing an original implementation: starting from the initial organigram, passing through transition matrix synthesis stage and reaching to the final fully functional system on a "Digilent Spartan-3" FPGA development board, which includes the user interface too.
topic algorithm organigram
execution section
sequencer
transition matrix
user interface
url http://dx.doi.org/10.4316/AECE.2010.02003
work_keys_str_mv AT ioanad newtechniquesforimplementationofhardwarealgorithmsinsidefpgacircuits
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