| Summary: | Silicon heterojunction metal wrap through solar cells have the potential for high efficiencies in a simple process flow. However, the non-conformal deposition of the hydrogenated amorphous silicon emitter causes specific loss mechanisms of this cell concept. The emitter does not fully cover the inner via surface. As a consequence, the via surface is not passivated and the via metallization is in electrical contact with the silicon base. The resulting loss processes are determined in 3D TCAD simulations. While via related recombination losses are negligible even for highest surface recombination velocities, the resistive losses are found to be critical. The limit for the contact resistance between via metallization and silicon is in the range of 1 Ωcm2, depending on substrate doping and via diameter. Below this value, the cell performance significantly degrades. Finally, three different approaches for novel SHJ-MWT solar cells are discussed.
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