A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory
The physical unclonable function (PUF) is a promising low-cost hardware security primitive. Recent advances in nanotechnology have provided new opportunities for nanoscale PUF circuits. The resistive random access memory (RRAM) is extensively used in nanoscale circuits due to its low cost, non-volat...
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doaj-e222130d23844323a329c10322e07b2a2021-05-27T23:05:21ZengIEEEIEEE Open Journal of Nanotechnology2644-12922021-01-012314010.1109/OJNANO.2021.30581699351634A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile MemoryJiang Li0https://orcid.org/0000-0002-2792-3951Yijun Cui1https://orcid.org/0000-0002-6262-2329Chongyan Gu2https://orcid.org/0000-0002-3028-8004Chenghua Wang3Weiqiang Liu4https://orcid.org/0000-0001-8398-8648Fabrizio Lombardi5https://orcid.org/0000-0003-3152-3245College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, ChinaCollege of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, ChinaCentre for Secure Information Technologies, Queen's University Belfast, Belfast, U.K.College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, ChinaCollege of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, ChinaDepartment of Electrical and Computer Engineering, Northeastern University, Boston, MA 40125, USAThe physical unclonable function (PUF) is a promising low-cost hardware security primitive. Recent advances in nanotechnology have provided new opportunities for nanoscale PUF circuits. The resistive random access memory (RRAM) is extensively used in nanoscale circuits due to its low cost, non-volatility and easy integration with CMOS. This paper proposes a novel tristate hybrid PUF (TH-PUF) design based on a one-transistor-one-RRAM (1T1R) cell; this cell can be configured into two weak PUFs and a strong PUF using few control signals. To assess the proposed PUF design, a compact RRAM model at UMC 65 nm technology is employed. Simulation results show that the proposed TH-PUF achieves good uniqueness, reliability as well as a higher gate usability compared with an entire CMOS PUFs. The number of challenge response pairs (CRPs) of the proposed TH-PUF is larger than other RRAM-based PUFs. Moreover, the TH-PUF is more resistant to a modeling machine learning attack than traditional PUF designs.https://ieeexplore.ieee.org/document/9351634/Physical unclonable functionhardware securityresistive random access memorymodeling attack |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Jiang Li Yijun Cui Chongyan Gu Chenghua Wang Weiqiang Liu Fabrizio Lombardi |
spellingShingle |
Jiang Li Yijun Cui Chongyan Gu Chenghua Wang Weiqiang Liu Fabrizio Lombardi A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory IEEE Open Journal of Nanotechnology Physical unclonable function hardware security resistive random access memory modeling attack |
author_facet |
Jiang Li Yijun Cui Chongyan Gu Chenghua Wang Weiqiang Liu Fabrizio Lombardi |
author_sort |
Jiang Li |
title |
A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory |
title_short |
A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory |
title_full |
A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory |
title_fullStr |
A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory |
title_full_unstemmed |
A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory |
title_sort |
physical unclonable function using a configurable tristate hybrid scheme with non-volatile memory |
publisher |
IEEE |
series |
IEEE Open Journal of Nanotechnology |
issn |
2644-1292 |
publishDate |
2021-01-01 |
description |
The physical unclonable function (PUF) is a promising low-cost hardware security primitive. Recent advances in nanotechnology have provided new opportunities for nanoscale PUF circuits. The resistive random access memory (RRAM) is extensively used in nanoscale circuits due to its low cost, non-volatility and easy integration with CMOS. This paper proposes a novel tristate hybrid PUF (TH-PUF) design based on a one-transistor-one-RRAM (1T1R) cell; this cell can be configured into two weak PUFs and a strong PUF using few control signals. To assess the proposed PUF design, a compact RRAM model at UMC 65 nm technology is employed. Simulation results show that the proposed TH-PUF achieves good uniqueness, reliability as well as a higher gate usability compared with an entire CMOS PUFs. The number of challenge response pairs (CRPs) of the proposed TH-PUF is larger than other RRAM-based PUFs. Moreover, the TH-PUF is more resistant to a modeling machine learning attack than traditional PUF designs. |
topic |
Physical unclonable function hardware security resistive random access memory modeling attack |
url |
https://ieeexplore.ieee.org/document/9351634/ |
work_keys_str_mv |
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