Red de Procesadores Evolutivos para solucionar el Problema de los Tres Colores. Implementación en Hardware.

• Main Authors: José Antonio Castaño Guevara, Valery Moreno, Alejandro Cabrera, Abraham Gutiérrez, Víctor Martínez
• Format: Article
• Language: Spanish
• Published: Universidad de Ciencias Informáticas 2015-10-01
• Series: Revista Cubana de Ciencias Informáticas
• Subjects: NEP; FPGA; VHDL; Complex Problem; Parallel Procesing
• Online Access: http://rcci.uci.cu/index.php?journal=rcci&page=article&op=view&path[]=1193&path[]=388

In this paper, a Network of Evolutionary Processors (NEP) is implemented, to solve the problem of the three colors. To achieve implementation, it was used as an FPGA hardware resource. The main objective of this work is to demonstrate the feasibility of the physical implementation of parallel algorithms to solve problems NP -complete. With this implementation is achieved that the implementation of the solution to be made reliably, quickly and efficiently. The project was developed using the Xilinx ISE 12.1 tool, using hardware description language to VHDL. For the simulation tool was used ISim 12.1, also from Xilinx. The results were tested using the platform Atlys Board Company which contains a Digilent Spartan-6 LX45 FPGA, Xilinx also. Images of the tool used, the Test Kit and simulation perf ormed and a table of data showing that the implementation of this complex algorithm used very few FPGA resources used are shown.