Modeling and Implementation of a Power Estimation Methodology for SystemC

This work describes a methodology to model power consumption of logic modules. A detailed mathematical model is presented and incorporated in a tool for translation of models written in VHDL to SystemC. The functionality for implicit power monitoring and estimation is inserted at module translation....

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Bibliographic Details
Main Authors: Matthias Kuehnle, Andre Wagner, Alisson V. Brito, Juergen Becker
Format: Article
Language:English
Published: Hindawi Limited 2012-01-01
Series:International Journal of Reconfigurable Computing
Online Access:http://dx.doi.org/10.1155/2012/439727

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