Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving Power
In this paper, a FPGA model of intelligent traffic light system with power saving was built. The intelligent traffic light system consists of sensors placed on the side's ends of the intersection to sense the presence or absence of vehicles. This system reduces the waiting time when the traffic...
Main Author: | |
---|---|
Format: | Article |
Language: | English |
Published: |
Al-Khwarizmi College of Engineering – University of Baghdad
2012-01-01
|
Series: | Al-Khawarizmi Engineering Journal |
Subjects: | |
Online Access: | http://www.iasj.net/iasj?func=fulltext&aId=64565 |
id |
doaj-ffe8b7fe99ec4733950b7f30af9325a6 |
---|---|
record_format |
Article |
spelling |
doaj-ffe8b7fe99ec4733950b7f30af9325a62020-11-25T00:16:15Zeng Al-Khwarizmi College of Engineering – University of BaghdadAl-Khawarizmi Engineering Journal1818-11712012-01-018496105Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving PowerAli Hashim JryianIn this paper, a FPGA model of intelligent traffic light system with power saving was built. The intelligent traffic light system consists of sensors placed on the side's ends of the intersection to sense the presence or absence of vehicles. This system reduces the waiting time when the traffic light is red, through the transition from traffic light state to the other state, when the first state spends a lot of time, because there are no more vehicles. The proposed system is built using VHDL, simulated using Xilinx ISE 9.2i package, and implemented using Spartan-3A XC3S700A FPGA kit. Implementation and Simulation behavioral model results show that the proposed intelligent traffic light system model satisfies the specified operational requirements.http://www.iasj.net/iasj?func=fulltext&aId=64565Intelligent Traffic light systemIntelligent Traffic light controllersTraffic light algorithmFPGAXilinx ISE 9.2i. |
collection |
DOAJ |
language |
English |
format |
Article |
sources |
DOAJ |
author |
Ali Hashim Jryian |
spellingShingle |
Ali Hashim Jryian Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving Power Al-Khawarizmi Engineering Journal Intelligent Traffic light system Intelligent Traffic light controllers Traffic light algorithm FPGA Xilinx ISE 9.2i. |
author_facet |
Ali Hashim Jryian |
author_sort |
Ali Hashim Jryian |
title |
Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving Power |
title_short |
Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving Power |
title_full |
Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving Power |
title_fullStr |
Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving Power |
title_full_unstemmed |
Field Programmable Gate Array (FPGA) Model of Intelligent Traffic Light System with Saving Power |
title_sort |
field programmable gate array (fpga) model of intelligent traffic light system with saving power |
publisher |
Al-Khwarizmi College of Engineering – University of Baghdad |
series |
Al-Khawarizmi Engineering Journal |
issn |
1818-1171 |
publishDate |
2012-01-01 |
description |
In this paper, a FPGA model of intelligent traffic light system with power saving was built. The intelligent traffic light system consists of sensors placed on the side's ends of the intersection to sense the presence or absence of vehicles. This system reduces the waiting time when the traffic light is red, through the transition from traffic light state to the other state, when the first state spends a lot of time, because there are no more vehicles. The proposed system is built using VHDL, simulated using Xilinx ISE 9.2i package, and implemented using Spartan-3A XC3S700A FPGA kit. Implementation and Simulation behavioral model results show that the proposed intelligent traffic light system model satisfies the specified operational requirements. |
topic |
Intelligent Traffic light system Intelligent Traffic light controllers Traffic light algorithm FPGA Xilinx ISE 9.2i. |
url |
http://www.iasj.net/iasj?func=fulltext&aId=64565 |
work_keys_str_mv |
AT alihashimjryian fieldprogrammablegatearrayfpgamodelofintelligenttrafficlightsystemwithsavingpower |
_version_ |
1725383684539809792 |