| Summary: | Tongue body features such as colour is used in Traditional Chinese Medicine (TMC) practices to diagnose a patient's state of health. However, the diagnosis of one patient's health condition varies between practitioners. This gives rise to the need of a standard method such as using Support Vector Machine to identify the tongue body colour. SVM is a supervised machine learning algorithm that aims to explore the characteristics and correlations between the gathered data to deduce the most efficient way in classifying the data into groups. Typically, SVM classifiers are implemented in software where the classification performance is very dependent on the architecture of the general-purpose CPU. Since classification of tongue images is a recurring event, the design of a hardware accelerator is explored in this project. The purpose of design a hardware accelerator is to boost the classifier performance, execution time and latency so that it meets real-time constraints. Architectural optimization methods, such as loop unrolling, memory array partitioning, pipelining and adder tree implementation of the SVM classification algorithm are performed in Xilinx's Vivado HLS and later synthesized to target for FPGA implementation. To further optimize the resource utilization, 18-bits IEEE-754 floating-point representations for the floating point units are used. The SVM hardware is able to demonstrate 140x speed up with similar classification accuracy when compared to the software implementation in MATLAB.
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