S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance
This paper presents a neural-network-based SAR ADC power side-channel attack (PSA) method and a 12-bit, 1.25MS/s secure SAR ADC whose current equalizers protect the ADC from PSA. A prototype SAR ADC was fabricated in 65nm CMOS to demonstrate the proposed concepts. Without PSA protection, the propose...
Main Authors: | Jeong, Taehoon (Author), Chandrakasan, Anantha P (Author), Lee, Hae-Seung (Author) |
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Other Authors: | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor) |
Format: | Article |
Language: | English |
Published: |
Institute of Electrical and Electronics Engineers (IEEE),
2020-06-12T14:08:37Z.
|
Subjects: | |
Online Access: | Get fulltext |
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