ARCc: A case for an architecturally redundant cache-coherence architecture for large multicores
This paper proposes an architecturally redundant cache-coherence architecture (ARCc) that combines the directory and shared-NUCA based coherence protocols to improve performance, energy and dependability. Both coherence mechanisms co-exist in the hardware and ARCc enables seamless transition between...
Main Authors: | Khan, Omer (Contributor), Hoffmann, Henry Christian (Contributor), Lis, Mieszko (Contributor), Hijaz, Farrukh (Author), Agarwal, Anant (Contributor), Devadas, Srinivas (Contributor) |
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Other Authors: | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science (Contributor) |
Format: | Article |
Language: | English |
Published: |
Institute of Electrical and Electronics Engineers,
2012-06-28T20:01:54Z.
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Subjects: | |
Online Access: | Get fulltext |
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