High Performance Mixed Signal Circuits Enabled by the Direct Monolithic Heterogeneous Integration of InP HBT and Si CMOS on a Silicon Substrate

We present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous i...

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Main Authors: Kazior, T. E. (Author), LaRoche, J. R. (Author), Urteaga, M. (Author), Bergman, J. (Author), Choe, M. J. (Author), Lee, K. J. (Author), Seong, T. (Author), Seo, M. (Author), Yen, A. (Author), Lubyshev, D. (Author), Fastenau, J. M. (Author), Liu, W. K. (Author), Smith, D. (Author), Clark, D. (Author), Thompson, R. (Author), Bulsara, Mayank (Contributor), Fitzgerald, Eugene A. (Contributor), Drazek, C. (Author), Guiot, E. (Author)
Other Authors: MIT Materials Research Laboratory (Contributor), Massachusetts Institute of Technology. Department of Materials Science and Engineering (Contributor)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers, 2013-10-04T15:49:21Z.
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Summary:We present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).
United States. Defense Advanced Research Projects Agency (DARPA COSMOS Program (Contract Number N00014-07-C-0629))