Higher level modeling of analog integrated circuits

Higher level modeling of analog integrated circuits

Bibliographic Details
Main Author:	Mantooth, Homer Alan
Published:	Georgia Institute of Technology 2007
Subjects:	Linear integrated circuits Metal oxide semiconductors Bipolar transistors
Online Access:	http://hdl.handle.net/1853/14951

Similar Items

Analog integrated circuit design using GaAs C-HFETs
by: Gupta, Rakhee
Published: (2013)

Device based modelling of high current bipolar transistors for the detailed simulation of converter circuits
by: Prest, Rory Bruce
Published: (2014)

The design, fabrication, characterization, and modeling of a novel semiconductor device : the metal oxide semiconductor bipolar junction transistor
by: Okada, David N
Published: (2009)

Reliability and hot-electron effects in analog and mixed-mode circuits
by: Ge, David Ying
Published: (2013)

Distributed-channel bipolar device : experimentation, analytical modeling and applications
by: Jiang, Fenglai
Published: (2009)

The extraction of MOSFET parameters.
Published: (1988)

Variability Aware Device Modeling and Circuit Design in 45nm Analog CMOS Technology
by: Ajayan, K R
Published: (2018)

Scaling limits and opportunities of double-gate MOSFETS
by: Chen, Qiang
Published: (2007)

An integrated analog multiplier circuit
by: Traa, Einar
Published: (2012)

A CMOS circuit generator using differential pass transistors for implementing Boolean functions
by: Mahooti, Rabe'eh
Published: (1988)

Performance enhancement in column IV mobility, bandgap, and strain engineered MOSFETs
by: Onsongo, David Masara, 1972-
Published: (2011)

A precision analog small-signal model for submicron MOSFET devices
by: Yoon, Kwang Sub
Published: (2007)

Noise measurements, models and analysis in GaAs MESFETs circuit design
by: Yan, Kai-tuan Kelvin
Published: (2012)

Amorphous oxide semiconductors in circuit applications
by: McFarlane, Brian Ross
Published: (2008)

A large-signal model for the RF power MOSFET
by: Bordelon, John H.
Published: (2007)

Scalable voltage reference for ultra deep submicron technologies
by: Cave, Michael David
Published: (2008)

Intrinsic and extrinsic parameter fluctuation limits on gigascale integration (GSI)
by: Tang, Xinghai
Published: (2007)

Gallium arsenide integrated circuit modeling, layout and fabrication
by: Rutherford, William C.
Published: (2010)

Surface and geometrical effect on the punch-through device
by: Liu, Bin, 1957-
Published: (1988)

Analysis and modeling of GaAs MESFET's for linear integrated circuit design
by: Lee, Mankoo
Published: (2013)

Limitations of high speed sigma-delta A/D converter in GaAs technology
by: Asibal, Romeo Lim
Published: (2007)

Device characterization and analog circuit design for heterojunction FETs
by: Wang, Binan
Published: (2013)

Equivalent circuits for junctions of lossy and dispersive VLSI interconnects.
Published: (1994)

Voltage and temperature dependent gate capacitance and current model for high-K gate dielectric stack
by: Fan, Yang-yu
Published: (2008)

Analysis and design of n-channel MOS transistors for operation at 300°C
by: Cosentino, Stephen Joseph
Published: (1980)

Characterization of Transistor Matching in Silicon-Germanium Heterojunction Bipolar Transistors
by: Pratapgarhwala, Mustansir M.
Published: (2006)

Overview of Power Electronic Switches: A Summary of the Past, State-Of-The-Art and Illumination of the Future
by: Immanuel N. Jiya, et al.
Published: (2020-12-01)

Towards Silicon Carbide VLSI Circuits for Extreme Environment Applications
by: Muhammad Shakir, et al.
Published: (2019-05-01)

Development of a Statistical Model for NPN Bipolar Transistor Mismatch
by: Lamontagne, Maurice
Published: (2007)

An integrated adaptive bias solution for zero passive component count high-performance mixed-signal ICs
by: Tabler, John A.
Published: (2007)

Ultra low voltage DRAM current sense amplifier with body bias techniques
by: Gang, Yung-jin, 1957-
Published: (2012)

Study of germanium MOSFETs with ultrathin high-k gate dielectrics
by: Chen, Jer-hueih
Published: (2008)

Investigation of electrical characteristics of III-V MOS devices with silicon interface passivation layer
by: Zhu, Feng, 1978-
Published: (2012)

High-Frequency Characteristics of InGaP/GaAs Double Heterojunction Bipolar Transistor Epitaxially Grown on 200 mm Ge/Si Wafers
by: Loke Wan Khai, et al.
Published: (2020-01-01)

Desenvolvimento de sistemas e medida de ruído de alta e baixa frequência em dispositivos semicondutores
by: Manera, Leandro Tiago, 1977-
Published: (2010)

A CUSTOM BIPOLAR MICROPROCESSOR SUPPORT INTEGRATED CIRCUIT
by: Miller, Ira, 1943-
Published: (1986)

DESIGN OF MOS INTEGRATED CIRCUITS AT HIGH TEMPERATURE.
by: CHAN, TZO YAO.
Published: (1982)

Advanced numerical simulation modeling for semiconductor devices and it application to metal-semiconductor-metal photodetectors
by: Salem, Ali F
Published: (2007)

0.7-<inline-formula> <tex-math notation="LaTeX">$\mu$ </tex-math></inline-formula>m InP DHBT Technology With 400-GHz <inline-formula> <tex-math notation="LaTeX">${f}_{{T}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">${f}_{\text{MAX}}$ </tex-math></inline-formula> and 4.5-V BV<sub>CE0</sub> for High Speed and High Frequency Integrated Circuits
by: V. Nodjiadjim, et al.
Published: (2019-01-01)

Validity of the Jain and Balk analytic model for two-dimensional effects in short channel MOSFETS
by: Shelley, Valerie Anderson, 1957-
Published: (1988)