Hardware Consolidation Of Systolic Algorithms On A Coarse Grained Runtime Reconfigurable Architecture

Hardware Consolidation Of Systolic Algorithms On A Coarse Grained Runtime Reconfigurable Architecture

Application domains such as Bio-informatics, DSP, Structural Biology, Fluid Dynamics, high resolution direction finding, state estimation, adaptive noise cancellation etc. demand high performance computing solutions for their simulation environments. The core computations of these applications are i...

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Bibliographic Details
Main Author: Biswas, Prasenjit
Other Authors: Nandy, S K
Language:en_US
Published: 2013
Subjects:
Computer Architecture
Systolic Algorithms
REDEFINE
Numerical Linear Algebra Kernels
NLA Kernels
Custom Functional Units (CFU)
Computer Science
Online Access:http://etd.iisc.ernet.in/handle/2005/2108
http://etd.ncsi.iisc.ernet.in/abstracts/2705/G24895-Abs.pdf

Internet

http://etd.iisc.ernet.in/handle/2005/2108
http://etd.ncsi.iisc.ernet.in/abstracts/2705/G24895-Abs.pdf

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