Digitally Assisted Radio-Frequency Integrated Circuits

In this thesis, three radio frequency integrated circuits (RFICs) were digitally assisted for varying signal power, frequency or both. Performance paramters were 'optimized' in the sense of obtaining the best performance improvement possible through the methods used. The digital assist m...

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Bibliographic Details
Main Author: Stewart, DAVID
Other Authors: Queen's University (Kingston, Ont.). Theses (Queen's University (Kingston, Ont.))
Language:en
en
Published: 2013
Subjects:
RF
Online Access:http://hdl.handle.net/1974/8135
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spelling ndltd-LACETR-oai-collectionscanada.gc.ca-OKQ.1974-81352013-12-20T03:40:55ZDigitally Assisted Radio-Frequency Integrated CircuitsStewart, DAVIDMicrowaveRFIntegrated CircuitsDigital AssistElectrical EngineeringIn this thesis, three radio frequency integrated circuits (RFICs) were digitally assisted for varying signal power, frequency or both. Performance paramters were 'optimized' in the sense of obtaining the best performance improvement possible through the methods used. The digital assist method used a lookup table (LUT) of optimal bias points measured through extensive sweeps and linear interpolation to determine the optimal bias point of the chip between measured points. A Gilbert Cell was fabricated in 0.13 μm CMOS. Transistor gate bias voltages were swept with input power to find the optimal bias voltages for intermodulation distortion (IMD) performance. A power detector was on-chip for the digital assist. Linear interpolation was used to optimize biases for any input power between initially measured points. Whereas distortion generally increases with input power, the digitally assisted device reduced the distortion of large signals. The IIP3 was 2.83 dBm from -3.11 dBm, and the P1dB was -3.33 dBm from -12.06 dBm. The RF bandwidth was measured as 1 to 12 GHz and DC power consumption varied from 2.06 to 3.27 mW. A noise cancelling low noise amplifier (LNA) was designed and fabricated in 0.13 μm CMOS. A feedback capacitor was used to boost the gain of the input transistor for lower DC power and better S11. An on-chip frequency detector was implemented for the digital assist. The gain rolled off gradually from 1 GHz until the 3 dB cutoff at 7 GHz. The average noise figure was 4.1 dB and less than 5 dB across the band. With digital assist, the gain curve was flattened at about 15 dB with to a broader 8 GHz bandwidth without negatively affecting the noise figure. The S11 was below -12 dB. A power amplifier (PA) previously designed in 0.8 μm Gallium Nitride (GaN) used third order IMD cancellation by derivative superposition effective at a fixed frequency and output power. Digital assist eliminated the extreme sensitivity to variations. Digital assist and bilinear interpolation maintained a 10 dB improvement in OIP3 over the entire 1 to 6 GHz band for varying output power between 21 and 24 dBm.Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2013-07-30 12:02:50.668Queen's University (Kingston, Ont.). Theses (Queen's University (Kingston, Ont.))2013-07-30 12:02:50.6682013-08-01T18:26:57Z2013-08-01T18:26:57Z2013-08-01Thesishttp://hdl.handle.net/1974/8135enenCanadian thesesThis publication is made available by the authority of the copyright owner solely for the purpose of private study and research and may not be copied or reproduced except as permitted by the copyright laws without written authority from the copyright owner.
collection NDLTD
language en
en
sources NDLTD
topic Microwave
RF
Integrated Circuits
Digital Assist
Electrical Engineering
spellingShingle Microwave
RF
Integrated Circuits
Digital Assist
Electrical Engineering
Stewart, DAVID
Digitally Assisted Radio-Frequency Integrated Circuits
description In this thesis, three radio frequency integrated circuits (RFICs) were digitally assisted for varying signal power, frequency or both. Performance paramters were 'optimized' in the sense of obtaining the best performance improvement possible through the methods used. The digital assist method used a lookup table (LUT) of optimal bias points measured through extensive sweeps and linear interpolation to determine the optimal bias point of the chip between measured points. A Gilbert Cell was fabricated in 0.13 μm CMOS. Transistor gate bias voltages were swept with input power to find the optimal bias voltages for intermodulation distortion (IMD) performance. A power detector was on-chip for the digital assist. Linear interpolation was used to optimize biases for any input power between initially measured points. Whereas distortion generally increases with input power, the digitally assisted device reduced the distortion of large signals. The IIP3 was 2.83 dBm from -3.11 dBm, and the P1dB was -3.33 dBm from -12.06 dBm. The RF bandwidth was measured as 1 to 12 GHz and DC power consumption varied from 2.06 to 3.27 mW. A noise cancelling low noise amplifier (LNA) was designed and fabricated in 0.13 μm CMOS. A feedback capacitor was used to boost the gain of the input transistor for lower DC power and better S11. An on-chip frequency detector was implemented for the digital assist. The gain rolled off gradually from 1 GHz until the 3 dB cutoff at 7 GHz. The average noise figure was 4.1 dB and less than 5 dB across the band. With digital assist, the gain curve was flattened at about 15 dB with to a broader 8 GHz bandwidth without negatively affecting the noise figure. The S11 was below -12 dB. A power amplifier (PA) previously designed in 0.8 μm Gallium Nitride (GaN) used third order IMD cancellation by derivative superposition effective at a fixed frequency and output power. Digital assist eliminated the extreme sensitivity to variations. Digital assist and bilinear interpolation maintained a 10 dB improvement in OIP3 over the entire 1 to 6 GHz band for varying output power between 21 and 24 dBm. === Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2013-07-30 12:02:50.668
author2 Queen's University (Kingston, Ont.). Theses (Queen's University (Kingston, Ont.))
author_facet Queen's University (Kingston, Ont.). Theses (Queen's University (Kingston, Ont.))
Stewart, DAVID
author Stewart, DAVID
author_sort Stewart, DAVID
title Digitally Assisted Radio-Frequency Integrated Circuits
title_short Digitally Assisted Radio-Frequency Integrated Circuits
title_full Digitally Assisted Radio-Frequency Integrated Circuits
title_fullStr Digitally Assisted Radio-Frequency Integrated Circuits
title_full_unstemmed Digitally Assisted Radio-Frequency Integrated Circuits
title_sort digitally assisted radio-frequency integrated circuits
publishDate 2013
url http://hdl.handle.net/1974/8135
work_keys_str_mv AT stewartdavid digitallyassistedradiofrequencyintegratedcircuits
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