Concurrent gate-level circuit simulation
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010. === Cataloged from PDF version of thesis. === Includes bibliographical references (p. 42). === In the last several years, parallel computing on multicore processors has transformed fr...
Main Author: | Shelly, Jacinda R. (Jacinda Rene) |
---|---|
Other Authors: | Christopher J. Terman. |
Format: | Others |
Language: | English |
Published: |
Massachusetts Institute of Technology
2011
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Subjects: | |
Online Access: | http://hdl.handle.net/1721.1/61576 |
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