Distributed arithmetic architecture for the discrete cosine transform
The Discrete Cosine Transform is used in many image and video compression standards. Many methods have been developed for efficiently computing the Discrete Cosine Transform including flowgraph algorithms, distributed arithmetic and two-dimensional decompositions. A new architecture based on distrib...
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ndltd-ORGSU-oai-ir.library.oregonstate.edu-1957-342432012-10-09T03:14:06ZDistributed arithmetic architecture for the discrete cosine transformPoplin, DwightVideo compression -- Mathematical modelsTransformations (Mathematics)The Discrete Cosine Transform is used in many image and video compression standards. Many methods have been developed for efficiently computing the Discrete Cosine Transform including flowgraph algorithms, distributed arithmetic and two-dimensional decompositions. A new architecture based on distributed arithmetic is presented for computing the Discrete Cosine Transform and it's inverse. The main objective of the design is to minimize the area of the VLSI implementation while maintaining the throughput necessary for video and image compression standards such as MPEG and JPEG. Several improvements have been made compared to previously published distributed arithmetic architectures. These include elimination of four lookup tables and implementation of the lookup tables using logic instead of ROM. A model of the proposed architecture was written in C. The model was used to verify the accuracy of the architecture and to do JPEG compression on a series of test images. Behavioral simulations were performed with a hardware model written in the Verilog hardware description language. These behavioral simulations verify that the hardware implementation matches the C model. The model was synthesized using the Synopsis synthesis tool. The gate count and clock rate of the design were estimated using the synthesis results.Graduation date: 1997Kiaei, Sayfe2012-10-08T21:35:47Z2012-10-08T21:35:47Z1997-05-021997-05-02Thesis/Dissertationhttp://hdl.handle.net/1957/34243en_US |
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Video compression -- Mathematical models Transformations (Mathematics) |
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Video compression -- Mathematical models Transformations (Mathematics) Poplin, Dwight Distributed arithmetic architecture for the discrete cosine transform |
description |
The Discrete Cosine Transform is used in many image and video compression
standards. Many methods have been developed for efficiently computing the Discrete
Cosine Transform including flowgraph algorithms, distributed arithmetic and
two-dimensional decompositions.
A new architecture based on distributed arithmetic is presented for computing
the Discrete Cosine Transform and it's inverse. The main objective of the design is
to minimize the area of the VLSI implementation while maintaining the throughput
necessary for video and image compression standards such as MPEG and JPEG.
Several improvements have been made compared to previously published distributed
arithmetic architectures. These include elimination of four lookup tables and implementation
of the lookup tables using logic instead of ROM.
A model of the proposed architecture was written in C. The model was used to
verify the accuracy of the architecture and to do JPEG compression on a series of
test images. Behavioral simulations were performed with a hardware model written
in the Verilog hardware description language. These behavioral simulations verify
that the hardware implementation matches the C model. The model was synthesized
using the Synopsis synthesis tool. The gate count and clock rate of the design were
estimated using the synthesis results. === Graduation date: 1997 |
author2 |
Kiaei, Sayfe |
author_facet |
Kiaei, Sayfe Poplin, Dwight |
author |
Poplin, Dwight |
author_sort |
Poplin, Dwight |
title |
Distributed arithmetic architecture for the discrete cosine transform |
title_short |
Distributed arithmetic architecture for the discrete cosine transform |
title_full |
Distributed arithmetic architecture for the discrete cosine transform |
title_fullStr |
Distributed arithmetic architecture for the discrete cosine transform |
title_full_unstemmed |
Distributed arithmetic architecture for the discrete cosine transform |
title_sort |
distributed arithmetic architecture for the discrete cosine transform |
publishDate |
2012 |
url |
http://hdl.handle.net/1957/34243 |
work_keys_str_mv |
AT poplindwight distributedarithmeticarchitectureforthediscretecosinetransform |
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1716393283982196736 |