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spelling ndltd-OhioLink-oai-etd.ohiolink.edu-ucin14277979492021-08-03T06:29:33Z On Resilient System Testing and Performance Binning Han, Qiang Computer Engineering Resilient computing Delay testing Performance binning Yield improvement Error rate modeling Statistical analysis By allowing timing errors to occur and recovering them on-line, resilient systems are designed to eliminate the frequency or voltage margin to improve circuit performance or reduce power consumption. With the existence of error detection and correction circuits, resilient systems bring about new timing constraints for path delay testing. With the characteristics of allowing timing errors to occur and recovering them on-line, the metrics of resilient system performance are different from traditional circuits, which results in new challenges on resilient system performance binning. Due to these new characteristics of resilient systems, it is essential to develop new testing and binning methodologies for them. In this research, we focus on resilient system testing and performance binning, and attempt to push forward the pace of resilient system commercialization. We make the following contributions. First, we propose a new DFT (design-for-testability) technique, which is able to deal with all different types of timing faults existing in resilient systems, and we develop an efficient test method based on binary search for error collection circuits. Then, a performance binning method based on structural at-speed delay testing is developed for resilient systems to greatly save the binning cost, and an adaptive clock configuration technique is proposed for yield improvement. Last but not least, we propose a new statistical performance analysis tool for resilient systems, called SERA (statistical error rate analysis), which takes process variations into consideration for error rate analysis and produces performance distribution function. With the help of SERA, we develop a profit-oriented binning methodology for resilient systems. 2015-06-02 English text University of Cincinnati / OhioLINK http://rave.ohiolink.edu/etdc/view?acc_num=ucin1427797949 http://rave.ohiolink.edu/etdc/view?acc_num=ucin1427797949 unrestricted This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.
collection NDLTD
language English
sources NDLTD
topic Computer Engineering
Resilient computing
Delay testing
Performance binning
Yield improvement
Error rate modeling
Statistical analysis
spellingShingle Computer Engineering
Resilient computing
Delay testing
Performance binning
Yield improvement
Error rate modeling
Statistical analysis
Han, Qiang
On Resilient System Testing and Performance Binning
author Han, Qiang
author_facet Han, Qiang
author_sort Han, Qiang
title On Resilient System Testing and Performance Binning
title_short On Resilient System Testing and Performance Binning
title_full On Resilient System Testing and Performance Binning
title_fullStr On Resilient System Testing and Performance Binning
title_full_unstemmed On Resilient System Testing and Performance Binning
title_sort on resilient system testing and performance binning
publisher University of Cincinnati / OhioLINK
publishDate 2015
url http://rave.ohiolink.edu/etdc/view?acc_num=ucin1427797949
work_keys_str_mv AT hanqiang onresilientsystemtestingandperformancebinning
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