VLSI architectures of Viterbi transformation decoder

VLSI architectures of Viterbi transformation decoder

碩士 === 國立成功大學 === 電機工程研究所 === 76 ===

Bibliographic Details
Main Authors: WU, GIAN-SHUN, 吳乾舜
Other Authors: WANG, JUN-FA
Format: Others
Language:zh-TW
Published: 1988
Online Access:http://ndltd.ncl.edu.tw/handle/98786316173702024769
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spelling ndltd-TW-076NCKU24420692015-10-13T11:08:30Z http://ndltd.ncl.edu.tw/handle/98786316173702024769 VLSI architectures of Viterbi transformation decoder 魏特比轉換解碼器之超大型積體電路結構 WU, GIAN-SHUN 吳乾舜 碩士 國立成功大學 電機工程研究所 76 WANG, JUN-FA LI, ZHAO-YAN 王駿發 李肇嚴 1988 學位論文 ; thesis 59 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立成功大學 === 電機工程研究所 === 76 ===
author2 WANG, JUN-FA
author_facet WANG, JUN-FA
WU, GIAN-SHUN
吳乾舜
author WU, GIAN-SHUN
吳乾舜
spellingShingle WU, GIAN-SHUN
吳乾舜
VLSI architectures of Viterbi transformation decoder
author_sort WU, GIAN-SHUN
title VLSI architectures of Viterbi transformation decoder
title_short VLSI architectures of Viterbi transformation decoder
title_full VLSI architectures of Viterbi transformation decoder
title_fullStr VLSI architectures of Viterbi transformation decoder
title_full_unstemmed VLSI architectures of Viterbi transformation decoder
title_sort vlsi architectures of viterbi transformation decoder
publishDate 1988
url http://ndltd.ncl.edu.tw/handle/98786316173702024769
work_keys_str_mv AT wugianshun vlsiarchitecturesofviterbitransformationdecoder
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AT wúgānshùn wèitèbǐzhuǎnhuànjiěmǎqìzhīchāodàxíngjītǐdiànlùjiégòu
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