An 8*8 inverse DCT architecture and its VLSI implementation

An 8*8 inverse DCT architecture and its VLSI implementation

碩士 === 國立中正大學 === 電機工程研究所 === 81 ===

Bibliographic Details
Main Authors: Chen, Chi Ming, 陳祈銘
Other Authors: Kuo, Chung J.
Format: Others
Language:zh-TW
Online Access:http://ndltd.ncl.edu.tw/handle/72720697343662089457
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spelling ndltd-TW-081CCU004420102015-10-13T17:44:41Z http://ndltd.ncl.edu.tw/handle/72720697343662089457 An 8*8 inverse DCT architecture and its VLSI implementation 8*8逆離散餘弦轉換架構及其超大型積體電路實現 Chen, Chi Ming 陳祈銘 碩士 國立中正大學 電機工程研究所 81 Kuo, Chung J. 郭鐘榮 學位論文 ; thesis 0 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立中正大學 === 電機工程研究所 === 81 ===
author2 Kuo, Chung J.
author_facet Kuo, Chung J.
Chen, Chi Ming
陳祈銘
author Chen, Chi Ming
陳祈銘
spellingShingle Chen, Chi Ming
陳祈銘
An 8*8 inverse DCT architecture and its VLSI implementation
author_sort Chen, Chi Ming
title An 8*8 inverse DCT architecture and its VLSI implementation
title_short An 8*8 inverse DCT architecture and its VLSI implementation
title_full An 8*8 inverse DCT architecture and its VLSI implementation
title_fullStr An 8*8 inverse DCT architecture and its VLSI implementation
title_full_unstemmed An 8*8 inverse DCT architecture and its VLSI implementation
title_sort 8*8 inverse dct architecture and its vlsi implementation
url http://ndltd.ncl.edu.tw/handle/72720697343662089457
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