Studying for Fast Chien Search Decoding of Reed-Solomon Codes

• Main Authors: Liou, Reay Ching, 劉瑞清
• Other Authors: Kou, Foon Yeon
• Format: Others
• Language: zh-TW
• Published: 1994
• Online Access: http://ndltd.ncl.edu.tw/handle/21864649022407082375

碩士 === 中原大學 === 電機工程研究所 === 82 === In recently, Y. R. Shayan developed a fast decoding algorithm for binary double error - correcting BCH codes. The decoder can work on the high data rate transmission system. The decoding method is modified by the paper for using on the fast decoder of Reed-Solomon codes. A binary-decision approach to the Chien search is introduced to reduce the search time by a factor of two , and hence to increase the decoding speed. The new decoding algorithm is called the modified fast Chien search. The modified fast Chien Search algorithm can be applied on the decoder of Reed - Solomon codes. The new method use the fast decoding advantages of the microprocessor. Because the codewords are not all saved in the the memory ( ROM ), the memory is not required very large. It solves the problems of memory when the code's length is very long. A (15,11) Reed - Solomon decoder is used as design example to illustrate the operating procedure of the new decoding algorithm. The modified fast Chien Search algorithm not only can be applied on the decoder of Reed - Solomon codes. It also can be applied on the decoder of binary BCH codes. In microprocessor -based designs, owing to recent advances in solid - stste technology , enough capability can be placed on a single die , thereby reducing the part count. As an example, a decoder can be designed using the microprocessor for a single - chip solution. The only limitation to the applicability of microprocessors to Reed- Solomon Codes is their processing time. However, because of rapid advances in solid-state technology the speed limitation will be overcome in the near future. As a solution to this problem VLSI implementations of the decoders can be used.