| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 82 === In this thesis,the polycide gate formed by a stacked amorphous-
silicon(α-Si)/poly-silicon structure with CVD tungsten
silicide have been studied. Fisrt,the N+ polycide gates ofα-Si/
poly-Si or poly-Si/poly-Si with POCl3 diffusion and CVD WSi
were fabricated. For these structures after the annealing
process at 900℃ for 30 minutes,we observed that the gate oxide
ofα-Si/poly-Si/WSi structure contains less flourine atoms than
poly-Si/poly-Si/WSix.As a result the effective gate oxide
thickness ofα-Si/poly-Si/WSi is thinner than that of poly-Si/
poly-Si/WSi. Second, the P+ polycide gates ofα-Si/poly-Si/WSi
with a cap of poly-Si on the WSi were studied.We obtained that
the cap poly-Si layer above WSi pevented out-diffusion of boron
to WSi surface, which will produce depletion gate. Moreover,
the cap poly-Si could get the lower sheet resistance polycide.
When we implant dopant to form shallow of the junction source
and drain, the WSi was damaged.The cap poly-Si held on damage
layer and resulted in tungsten/silicon ratio no change. Hence,
for the electrical characteristics,the cap poly-Si process is
an appropriate choice for the P+ polycide gate.
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