Power-Efficient CMOS On-Chip High Voltage Generator

• Main Authors: Isaac Y. Chen, 陳曜洲
• Other Authors: Jei-Tsorng Wu
• Format: Others
• Language: en_US
• Published: 1994
• Online Access: http://ndltd.ncl.edu.tw/handle/14283459324884808512

碩士 === 國立交通大學 === 電子研究所 === 82 === Analog Circuits that can operate in a low supply voltage environment are critical for portable mixed-mode systems. The objective of this research is to investigate a circuits techniques for analog CMOS integrated circuits so that they can operate with a power supply voltage below 2 V. In order to minimize power dissipation, a framework for low-power analog signal processing is proposed. The framework contains a fully differential signal path operating between two low-voltage power rails, while analog switches are controlled by signals with high voltage generated from a low-power on-chip high voltage generator (HVG). A low-power on-chip high voltage generator (CPG) and a clock pattern generator for control of analog CMOS switches are under investigation. Low-power analog CMOS switches require digital high-voltage control signals. The digital high-voltage control signals have a supply voltage above double Vdd to ensure analog CMOS switches at the adequate ON state. In order to meet above specification, the efficient- power CMOS on-chip high voltage generator and the analog switches control for the 1.2 V CMOS analog-to-digital converter (ADC) is studied.