Vestigial Sideband Transceiver Architecture Verification and Digital Filter Implementation

碩士 === 國立中央大學 === 電機工程研究所 === 83 === In this thesis, we introduce Zenith VSB CATV system and propose a new apporach for VSB modulation. A pair of digital filters are derived, analyzed, and implemented to verify the new approach. I n the top...

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Bibliographic Details
Main Authors: Yin,Shin-Chung, 尹世沖
Other Authors: Su,Chau-Chin
Format: Others
Language:zh-TW
Published: 1995
Online Access:http://ndltd.ncl.edu.tw/handle/24955012136710718380
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Summary:碩士 === 國立中央大學 === 電機工程研究所 === 83 === In this thesis, we introduce Zenith VSB CATV system and propose a new apporach for VSB modulation. A pair of digital filters are derived, analyzed, and implemented to verify the new approach. I n the top-down design methodlogy, we have used Matlab, SPW, Veri log, and Cadence to obtain initial design, fine tune the design, and run system simulation and gate level simulations. To verify the approach, we use Zenith VSB HDTV system as a test vehicle. W e model the VSB modulation and demodulation system in mathematic al equations. The shaping filters beimg implemented successfully generates VSB signals for the target system. Finally, we use CCL standard cells to implement the shaping filters.