| Summary: | 碩士 === 國立中央大學 === 電機工程研究所 === 83 === This thesis describes a sparse matrix solver for general
circuit simulation. Especially in VLSI circuit simulation, the
mathematical model of the circuits introduce very large sparse
systems of linear equations. The sparse matrix solver is
developed to enhance the performance of circuit simulation. In
order to enhance simulation speed and maintain stability, the
Partial Gauss-Seidel scheme (PGS) is used as the matrix
solution method. This scheme combines direct solution using LU
factorization and iterative solution using Gauss-Seidel
relaxation. It can both have slower growth rate and avoid
divergence problem. In order to store the sparse matrices
efficiently, linked lists are used as the storage scheme.
Linked lists have the advantage that they can change size
dynamically, therefore they are quite accommodative to the
generation of fill-ins in direct methods. The implementation of
LU factorization with linked lists is demonstrated. Besides,
the ordering strategy that is helpful to maintain sparsity is
also implemented benefit brought by this strategy is presented.
Finally, the performance of this sparse matrix solver in
circuit simulation is demonstrated. A circuit simulator was
developed to test the sparse matrix solver. AC analysis of
simple RC circuits and transient analysis of amorphous-silicon
thin-film transistor circuits were executed. The waveforms of a
LCD panel were obtained. The comparisons between PGS solution
and direct solution are presented. The results shows that the
answers provided by them are indistinguishable while PGS
solution spent less time.
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