A Concurrent Error Detection and Correction Systolic Array Multiplier through Time Redundancy
碩士 === 國立清華大學 === 電機工程研究所 === 83 ===
Main Authors: | Yu, Yung-Chieh, 游永傑 |
---|---|
Other Authors: | Chang, Tsin-Yuan |
Format: | Others |
Language: | en_US |
Published: |
1995
|
Online Access: | http://ndltd.ncl.edu.tw/handle/20895851922828984867 |
Similar Items
-
Concurrent error detection and correction in systolic arrays
by: 王政治
Published: (1992) -
Concurrent Error Detection Techniques for Array Multipliers
by: Jen-Chiun Guan, et al.
Published: (2011) -
Concurrent Error Detection for a Galois-Field Inversion Systolic Array
by: Chuang, Yu-Chun, et al.
Published: (1997) -
Concurrent Error Detection and Correction in Polynomial Basis Multiplier over GF(2^m)
by: Chi Hiang Chang, et al.
Published: (2007) -
Concurrent Error Correction in Polynomial Basis Multiplier over GF(2^m)
by: Yih-Ming Huang, et al.
Published: (2005)