| Summary: | 碩士 === 國立臺灣科技大學 === 工程技術研究所 === 83 === Discrete Hartley transform (DHT) and the discrete Fourier
transform (DFT) have many important applications in signal
processing problems. This thesis presents some new array
structures which can efficiently compute the DHT and DFT. The
new structures are developed based on symmetric property of the
trigonometric transform and the IIR filter structure for each
processing element to reduce the total numbers of adders and
multipliers required. The discussion begins with the structures
for both the 1-D time-recursive and block DHT/DFT. These
structures are then coupled together for the 2-D transforms.
Since the symmetric property of the problem has been employed,
the resulting 2-D DHT/DFT can be readily obtained in real time
by using an array of postprocessors. Furthermore, in the 2-D
case, a new scheme by using only 2N registers (the transformed
data is N*N) is also introduced to maintain the pipelinability
of the whole structure. These proposed structures are all fully
parallel, pipelined, and modular, and thus thus are very
suitable for VLSI implementation. Compared with the existing
structures, these new ones requires lowest hardware complexity.
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