| Summary: | 碩士 === 國立臺灣科技大學 === 工程技術研究所 === 83 === ny switching networks have been proposed for broadband ISDN.
To achieve maximum throughput, most of the switching networks
ei- ther need large internal speed up or complex hardware
structure. For example,the input-output difference self-
routing network and Knockout switch require large internal
speed-up factors. In order to maintain the nonblocking property,
the internal speed of an NXN switching network has to be N
times as many as the maximum rate of the incoming packets. The
internal speed requirment can be re- duced by introducing
parallel switching planes which thereby in- creases the
hardware complexity. In this paper, a new ATM switch
architecture named Multinet switch is proposed. This self-
routing multistage switch with in- ternal buffers is capable of
achieving 100% throughput. Although the complexity of hardware
is similar to that of the input queue- ing switches. The
performance of throughput and delay of multinet switch are
similar to that of output queueing switches. Simple extension
of the Multinet switch to handle multicast traffic is also
proposed.
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