An Improved In0.5Ga0.5P/GaAs Heterostructure-Emitter Bipolar Transistors Utilizing GaAs Spacers

碩士 === 國立成功大學 === 電機工程研究所 === 84 === The conventional HBT suffers from larger offset voltage , resulting in unnecessary power consumption . In this thesis , we improve the common-emitter offset voltage by using heterostructure-emitter bipol...

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Main Authors: Shing-Dong Ho, 何信東
Other Authors: Wei-Chou Hsu
Format: Others
Language:zh-TW
Published: 1996
Online Access:http://ndltd.ncl.edu.tw/handle/77964503790648095243
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spelling ndltd-TW-084NCKU04421162016-02-05T04:16:28Z http://ndltd.ncl.edu.tw/handle/77964503790648095243 An Improved In0.5Ga0.5P/GaAs Heterostructure-Emitter Bipolar Transistors Utilizing GaAs Spacers 利用空間層改良磷化銦鎵/砷化鎵異質結構射極式雙載子電晶體 Shing-Dong Ho 何信東 碩士 國立成功大學 電機工程研究所 84 The conventional HBT suffers from larger offset voltage , resulting in unnecessary power consumption . In this thesis , we improve the common-emitter offset voltage by using heterostructure-emitter bipolar transistor ( HEBT ) structure which moves the heterojunction from p-n junction to the emitter region . The proposed structures exhit no potential spike at emitter-base ( E-B ) junction . Consequently , low offset voltage and no knee-shaped characteristics are achieved . The improved In0.5Ga0.5P/GaAs SHEBT and DHEBT structures with an undoped GaAs spacer layer at p-n junction are proposed. The undoped GaAs spacer is used to reduce the recombination at interface and enhance the current gain . The current gains of In0.5Ga0.5P/GaAs SHEBT and DHEBT for unpassivated devices are 200 and 120 , respectively . By using the emitter edge-thinning technique , the current gain of SHEBT and DHEBT is up to 350 and 180 , respectively . Among the reported HEBT's , the current gain of SHEBT is highest . The offset voltage of SHEBT and DHEBT are 80 and 50 mV ,respectively . The low offset voltage also indicates that no potential spike exists at E-B junction . Wei-Chou Hsu 許渭州 1996 學位論文 ; thesis 60 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立成功大學 === 電機工程研究所 === 84 === The conventional HBT suffers from larger offset voltage , resulting in unnecessary power consumption . In this thesis , we improve the common-emitter offset voltage by using heterostructure-emitter bipolar transistor ( HEBT ) structure which moves the heterojunction from p-n junction to the emitter region . The proposed structures exhit no potential spike at emitter-base ( E-B ) junction . Consequently , low offset voltage and no knee-shaped characteristics are achieved . The improved In0.5Ga0.5P/GaAs SHEBT and DHEBT structures with an undoped GaAs spacer layer at p-n junction are proposed. The undoped GaAs spacer is used to reduce the recombination at interface and enhance the current gain . The current gains of In0.5Ga0.5P/GaAs SHEBT and DHEBT for unpassivated devices are 200 and 120 , respectively . By using the emitter edge-thinning technique , the current gain of SHEBT and DHEBT is up to 350 and 180 , respectively . Among the reported HEBT's , the current gain of SHEBT is highest . The offset voltage of SHEBT and DHEBT are 80 and 50 mV ,respectively . The low offset voltage also indicates that no potential spike exists at E-B junction .
author2 Wei-Chou Hsu
author_facet Wei-Chou Hsu
Shing-Dong Ho
何信東
author Shing-Dong Ho
何信東
spellingShingle Shing-Dong Ho
何信東
An Improved In0.5Ga0.5P/GaAs Heterostructure-Emitter Bipolar Transistors Utilizing GaAs Spacers
author_sort Shing-Dong Ho
title An Improved In0.5Ga0.5P/GaAs Heterostructure-Emitter Bipolar Transistors Utilizing GaAs Spacers
title_short An Improved In0.5Ga0.5P/GaAs Heterostructure-Emitter Bipolar Transistors Utilizing GaAs Spacers
title_full An Improved In0.5Ga0.5P/GaAs Heterostructure-Emitter Bipolar Transistors Utilizing GaAs Spacers
title_fullStr An Improved In0.5Ga0.5P/GaAs Heterostructure-Emitter Bipolar Transistors Utilizing GaAs Spacers
title_full_unstemmed An Improved In0.5Ga0.5P/GaAs Heterostructure-Emitter Bipolar Transistors Utilizing GaAs Spacers
title_sort improved in0.5ga0.5p/gaas heterostructure-emitter bipolar transistors utilizing gaas spacers
publishDate 1996
url http://ndltd.ncl.edu.tw/handle/77964503790648095243
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