The Dispatching Strategies for Wafer Fabrication Factories with Queue-Time-Limit Considerations
碩士 === 國立交通大學 === 工業工程研究所 === 84 === Semi-conductor industry is highly developing during these years in Taiwan.Its complicatedprocessis and various characteristics of machines increases thedifficulty in the production control. However,moset studies, so fa...
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1996
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| Online Access: | http://ndltd.ncl.edu.tw/handle/90005516874475283385 |
| Summary: | 碩士 === 國立交通大學 === 工業工程研究所 === 84 === Semi-conductor industry is highly developing during these years
in Taiwan.Its complicatedprocessis and various characteristics
of machines increases thedifficulty in the production control.
However,moset studies, so far,concentrate on howto shortern the
production cycle time rather tha to improve the yield of wafer
fabricationTherefore,the major objective of this research is to
develop a dispatching strategy focusing on "Queue Time Limit"
which highly influences the yield of wafer fabrication.by
carefully analyzing itsimpacts on the fab and the pertinent
factors that ahould be considered while the dispatching is
executed.a Queue Time Limit dispatching strtegy is developed.To
validate the effectiveness of the dispatching strtegy proposedin
this research.a simulation model is construted.The simulation
results indecate that the dispatching stategy developed in this
research can effectively reduce the numbers of wafer reworks and
improve the yield of wafer fabrication significantly while not
increasing the production cycle time.
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