A Circuit Simulation and Analysis on High Speed DRAM
碩士 === 國立中山大學 === 電機工程研究所 === 84 === In this thesis, a DRAM circuit was developed for our simulation. Each subcircuit in the system was discussed. In our circuit, we design a control circuit for bit-line eqivalence precharge, it includes an...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1996
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| Online Access: | http://ndltd.ncl.edu.tw/handle/68875611408461710635 |