Design Some Image Processing Algorithms on Reconfigurable Array of Porcessors with Wider Bus Networks

• Main Authors: Shung-Shing Lee, 李信興
• Other Authors: Shi-Jinn Horng
• Format: Others
• Language: zh-TW
• Published: 1996
• Online Access: http://ndltd.ncl.edu.tw/handle/09314391927782575012

博士 === 國立臺灣科技大學 === 電機工程研究所 === 84 === In this thesis, the parallel computation model on which our algorithms are based is the reconfigurable array of processors with wider bus networks (RAPWBN). Conventionally, only one bus is connected between two processors but in this machine it has a set of buses. Such a characteristic makes the computation power of this machine enormously. We propose a series of algorithms for image processing. Based on the base-m number system, we first introduce some basic operation algorithms such as a constant time algorithm to compute the prefix sum for the bit one of a binary sequence of size N using N processors. Then some related applications are derived in constant time such as calculating the histogram of an image, computing the Hough transform, segmenting an image based on first order entropy (the entropy of an image histogram) and labelling an binary image. Based on second order entropy (the entropy obtained from the distribution of the two neighbor pixels'' gray levels in an image, called co-occurrence matrix), we first propose a thresholding algorithm by improving the relative entropy-based thresholding algorithm. This algorithm combines the concepts of relative entropy with that of local entropy and also includes the quadtree hierarchical structure in it. Secondly, we derive a parallel algorithm to solve this problem on RAPWBN.