| Summary: | 碩士 === 國立成功大學 === 電機工程學系 === 85 ===
In this thesis, a DC-AC converter controlled with feedforward pulsewidth modulation (FF-PWM) is proposed. It is mainly consisted of a two-output-ports flyback transformer and a commutator. Because the output voltage magnitude of a transformer is proportional to the number of its turns, the output voltage can be controlled simply be varying the other slave output. At low frequency, the converter behaves as a linear power amplifier with constant gain. In addition, the seitching frequency of the power switches in the commutator is as low as 120Hz and each switch changes its status as the voltage across it is nearly zero, so the swicthing loss is very little and the dead time effect is no longer a concern. An experimental prototype is set up to verify the hypothesis and discuss the practicability.
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