New Parameter Extraction and Device Modeling Techniques for Deep-Submicrometer n-MOSFET''s

• Main Authors: Jean, Yuh-Sheng, 簡育生
• Other Authors: Ching-Yuan Wu
• Format: Others
• Language: zh-TW
• Published: 1997
• Online Access: http://ndltd.ncl.edu.tw/handle/50740060816500702368

博士 === 國立交通大學 === 電子工程學系 === 85 === This thesis focuses on the parameter extraction and device modeling techniques for submicrometer and deep submicrometer n- MOSFET''s. The extraction method of each paramaters is based on its domination in the device characteristics. All the structure and mobility parameters are considered in sequence. Besides, the Reverse Short-Channel Effect(RSCE) on the threshold voltage of short-channel devices are investigated. An accurate model is proposed to simulate this effect, and a simplified analytic model can be derived. Furthermore, an analytic threshold-voltage model on the damaged MOSFET devices is derived from the 3-zones Poisson''s equation with considering the 2-Deffects. This thesis focuses on the most important issues of very-short-channel MOSFET''s. In this thesis, the parameter extraction, device simulation and modeling are comprehensively studied. In Chapter 1, motivation and general introduction of this thesis are given. In Chapetr 2, a new extraction algorithm for the metallurgical channel length of conventional and Lightly Doped Drain(LDD) MOSFET''s is presented, which is based on the well-known resistance method with performing a special technique to eliminate the uncertainty of the channel length as well as to reduce the influence of the parasitic source/drain resistance on threshold-voltage determination. In particular, the metallurgicall channel length is determined from a wide range of gate-voltage-dependent effective channel length at an adequate gate-voltage-dependent effective channel length at an adequate gate overdrive. The 2-D numerical analysis clearly shows that the adequate gate overdrive is strongly dependent on the dopant concentration in the source/drain region. Therefore, an analytic equation is derived to determine the adequate gate overdrive for various source/drain and channel dopings. It shows that higher and lower gate overdrives are needed to accurately determine the metallurgical channel length of conventional and LDD MOSFET devices, respectively. It is the first time that we can give a correct gate overdrive to accurately extract the metallurgical channel length not oly for conventional devices but also for LDD MOS devices. Besides, the parasitic source/drain resistance can also be extracted using our new extraction algorithm. In Chapter 3, a new physical model for doping redistribution induced by the RSCE for n-MOSFET devices is proposed. It is deduced from the well-known physical and electrical characteristics of the RSCE. This model accounts for not only the lateral but also the vertical doping redistribution. The most importance is the doping depletion effect in the bulk is also included by a depletion coefficient. Simulation results show good agreements as compared with the experimrntal data. In addition, simplifying this model by double integrations, an analytic threshold-voltage model for n-MOSFET devices with the RSCE is derived. The derived analytic threshold-voltage model introduces four parameters to describe the RSCE, each of them has its physical meaning and therefore can help us to get more insight into the RSCE. This simple and accurate model can be easily implemented into circuit simulator without major modification. In Chapter 4, a new analytic threshold-voltage model for a MOSFET device with localized interface charges is presented. Dividing the damaged MOSFET device into three zones, the surface potential is obtained by solving the 2-D Poisson''s equation. Calculating the minimum surface potential,the analytic threshold-voltage model is derived. It is verified that the model accurately predicts the threshold voltage for not only the fresh devices but also the damaged devices. Moreover, the DIBL and substrate bias effects are also included in this model. It is shown that the screening effects due to built-in potential and drain bias dominate the impactof the localized interface charges on the threshold voltage. Calculation results show that the extension, position and density of localized interface charges are the main issues to influence the threshold voltageof a damaged MOSFET device. Simulation results using a 2-D device simulator are used to verify the validity of this model, and quite good agreements are obtained for various cases. In Chapter 5, the descriptions for the extraction techniques of the device parameters are illustrated. The extraction technique of each parameter is obtained according to its most important influences on the device characteristics for different devices operated under different bias conditions. All the parameters including device structure and mobility model model for a set of test devices are extracted in sequence. The whole extracted parameters are putting into a device simulator-SUMMOS and the simulation results show excellent agreements as compared with the experimental data, and the validity of the extraction techniques is verified. Device characteristics for the existing devices are examined, some comments and suggestions on improving the performance are declared. In addition, a design example for a very short-channel device is demonstrated by considering the threshold-voltage roll-off and Drain-Induced Barrier Lowering( DIBL) effects, lateral electric field, leakage current, transconductance and saturation current of the device. Finally, conclusions are given in Chapter 6, where the major contributions of this thesis and some possible future researches are proposed.